scispace - formally typeset
Patent

Die paddle enhancement for exposed pad in semiconductor packaging

Reads0
Chats0
TLDR
In this paper, a new design for the die-paddle that is used as part of a package for packaging semiconductor devices is presented, which creates a space between the ground ring of the diepaddle and the surface over which the ground paddle is mounted.
Abstract
A new design is provided for the die-paddle that is used as part of a package for packaging semiconductor devices. The new design of the invention creates a space between the ground ring of the die-paddle and the surface over which the ground paddle is mounted. The new design further comprises an S-shaped segment between the ground ring and the center of the die-paddle, the S-shaped segment provides stress relieve between the ground ring and the center of the die-paddle.

read more

Citations
More filters
Patent

Semiconductor device including leadframe with a combination of leads and lands and method

TL;DR: In this article, the authors define a die pad defining multiple peripheral edge segments and a plurality of leads and lands which are provided in a prescribed arrangement in one embodiment of a semiconductor device, where at least portions of the die pad, the leads, the lands, and the semiconductor die are encapsulated by the package body.
Patent

Conductive pad on protruding through electrode

TL;DR: In this paper, a through electrode is formed in a semiconductor die, and a dielectric layer is then formed to cover the through electrode, which has an opening by being partially etched to allow the through electrodes to protrude to the outside.
Patent

Semiconductor device comprising a conductive pad on a protruding-through electrode

TL;DR: In this article, the authors describe a semiconductor device that comprises an inactive die side and an active die side opposite the inactive side, where the through hole comprises an inner wall, an insulating layer coupled to the inner wall of a through hole, a through electrode inside of the insulating layers, and a dielectric layer coupling to the inactive layer.
Patent

Drop resistant bumpers for fully molded memory cards

TL;DR: In this paper, a memory card comprising a leadframe having a plurality of contacts, at least one die pad, and conductive traces extending from respective ones of the contacts toward the die pad is described.
References
More filters
Patent

Thermally and electrically enhanced PBGA package

TL;DR: In this article, the die and the substrate are interconnected by means of signal transferring means. And the die is attached to the substrate by a die paddle and a power ring is formed around the die paddle on the surface of the substrate.
Patent

Plastic encapsulated semiconductor device and method of manufacturing the same

TL;DR: In this paper, a plastic encapsulated semiconductor device consisting of a die pad, die pad support pins, a semiconductor chip mounted on the die pad and thin metal wires for connecting the electrode of the semiconductor chips to leads, while the respective bottom faces of the leads forming terminal portions are exposed.
Patent

Single layer leadframe design with groundplane capability

TL;DR: In this article, a semiconductor chip having a plurality of signal sites and ground sites is positioned on the semiconductor chips support of the leadframe, and each of the signal leads is electrically isolated from each other and from the common ground portion of leadframe.
Patent

Methods of making thin integrated circuit device packages with improved thermal performance and substrates for making the packages

TL;DR: In this article, the authors describe a method of making a substrate for making integrated circuit device packages and substrates for making the packages, which is based on an unpatterned sheet of polyimide material having a first surface and an opposite second surface.