Journal ArticleDOI
Effect of VLSI technology scaling on ESD current-carrying capability
TLDR
In this paper, the authors investigated the impact of VLSI scaling on the robustness of individual transistors against electrostatic discharge (ESD) damage and showed that if one relaxes the scaling in the device width dimension to κ 0.3, instead of κ, where κ is the scaling factor, the same or better ESD performance can be achieved as feature size shrinks.About:
This article is published in Journal of Electrostatics.The article was published on 1997-07-01. It has received 5 citations till now. The article focuses on the topics: Snapback & Scaling.read more
Citations
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Proceedings ArticleDOI
A Robust ESD Event Locator System With Event Characterization
TL;DR: In this article, a reverse Global Positioning System (GPS) concept was used to locate ESD events with a spatial resolution of 1cm x lcm x 1cm.
Journal ArticleDOI
Idealized model for charged device electrostatic discharge
TL;DR: In this article, an analysis is presented for a two-conductor problem in which the source conductor, a sphere with either constant charge or constant potential, approaches a ground plane.
Journal ArticleDOI
A robust ESD event locator system with event characterization
TL;DR: In this article, a reverse global positioning system with four receivers is used to locate ESD events with a spatial resolution of 0.31 cm×0.14 cm× 0.77 cm.
Proceedings ArticleDOI
A circuit approach to model composite structures affected by electrostatic discharge
TL;DR: A circuit network analogue for the solution of the Maxwell's equations in composite structures affected by electrostatic discharge events in terms of voltages, currents and their corresponding field variables is presented.
Journal ArticleDOI
Circuit network analog for ESD current strikes composite structures
TL;DR: In this article, a circuit network analog for the solution of Maxwell's equations in composite structures affected by an electrostatic discharge event is presented, which consists of conductances, inductances and capacitances.
References
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Book
Semiconductor Devices: Physics and Technology
TL;DR: In this paper, the transmission coefficient of a symmetric resonance tunneling diode has been derived for a Symmetric Resonant-Tunneling Diode, and it has been shown that it can be computed in terms of the Density of States in Semiconductor.
Journal ArticleDOI
The impact of technology scaling on ESD robustness and protection circuit design
A. Amerasekera,C. Duvvury +1 more
TL;DR: In this paper, the trend in ESD robustness as a function of technology scaling, for feature sizes down to 0.25 /spl mu/m, have been experimentally determined using single finger nMOS transistors and full ESD protection circuits.
Journal ArticleDOI
Second breakdown and damage in junction devices
TL;DR: In this article, the authors studied the second breakdown in silicon-on-sapphire (SOS) thin-film diodes using the stroboscopic technique of Sunshine.
Journal ArticleDOI
ESD sensitivity and VLSI technology trends: thermal breakdown and dielectric breakdown
TL;DR: In this article, the implication of these design rules for the ESD sensitivity of IC devices was investigated by using models of thermal breakdown and dielectric breakdown. And the authors showed that a factor of 10 shrinkage in feature sizes makes pn junctions 5 times more sensitive to electrical stresses such as ESD.
Related Papers (5)
Evolution, Revolution, and Technology Scaling—The Impact on ESD and EOS Reliability
Statistical threshold-voltage variation and its impact on supply-voltage scaling
David Burnett,Shih Wei Sun +1 more