Proceedings ArticleDOI
Energy-Aware Fault-Tolerant CGRAs Addressing Application with Different Reliability Needs
Syed M. A. H. Jafri,Stanislaw J. Piestrak,Kolin Paul,Ahmed Hemani,Juha Plosila,Hannu Tenhunen +5 more
- pp 525-534
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TLDR
A polymorphic fault tolerant architecture that can be tailored to efficiently support the reliability needs of multiple applications at run-time and significantly reduces the area overhead for self-checking and fault tolerant versions, compared to the state of the art adaptive reliability techniques.Abstract:
In this paper, we propose a polymorphic fault tolerant architecture that can be tailored to efficiently support the reliability needs of multiple applications at run-time. Today, coarse-grained reconfigurable architectures (CGRAs) host multiple applications with potentially different reliability needs. Providing platform-wide worst-case (maximum) protection to all the applications is neither optimal nor desirable. To reduce the fault-tolerance overhead, adaptive fault-tolerance strategies have been proposed. The proposed techniques access the reliability requirements of each application and adjust the fault-tolerance intensity (and hence overhead), accordingly. However, existing flexible reliability schemes only allow to shift between different levels of modular redundancy (duplication, triplication, etc.) and deal with only a single class of faults (e.g. soft errors). To complement these strategies, we propose energy-aware fault-tolerance that, in addition to modular redundancy, can also provide low cost, sub-modular (e.g. residue mod 3) redundancy, to cater both permanent and temporary faults. Our solution relies on an agent based control layer and a configurable fault-tolerance data path. The control layer identifies the application class and configures the data path to provide the needed reliability. Simulation results using a few selected algorithms (FFT, matrix multiplication, and FIR filter) showed that the proposed method provides flexible protection with energy overhead ranging from 3.125% to 107% for different reliability levels. Synthesis results have confirmed that the proposed architecture significantly reduces the area overhead for self-checking (59.1%) and fault tolerant (7.1%) versions, compared to the state of the art adaptive reliability techniques.read more
Citations
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Proceedings ArticleDOI
MOCHA: Morphable Locality and Compression Aware Architecture for Convolutional Neural Networks
TL;DR: MOCHA has three features that differentiate it from the state-of-the-art: the ability to compress input/ kernels, the flexibility to interleave various optimizations, and intelligence to automatically interleave and cascade the optimizations, depending on the dimension of a specific CNN layer and available resources.
Proceedings ArticleDOI
SiLago-CoG: Coarse-Grained Grid-Based Design for Near Tape-Out Power Estimation Accuracy at High Level
TL;DR: Simulation and synthesis results reveal that SiLago-CoG provides up to 15X better power estimates in 680X less time at the cost of up to 50% additional area, compared to state-of-the-art.
Journal ArticleDOI
TransMap: Transformation Based Re m apping and P arallelism for High Utilization and Energy Efficiency in CGRAs
TL;DR: TransMap stores only a single implementation and applies a series for transformations to the stored bitstream for remapping or parallelizing an application, and offers significant reductions in configuration memory requirements, compared to state of the art compaction techniques.
Proceedings ArticleDOI
FIST: A Framework to Interleave Spiking Neural Networks on CGRAs
Tuan Ngyen,Syed M. A. H. Jafri,Masoud Daneshtalab,Ahmed Hemani,Sergei Dytckov,Juha Plosila,Hannu Tenhunen +6 more
TL;DR: FIST allows the processing elements and the network to dynamically morph into either conventional CGRA or a neural network, depending on the hosted application, and reveals that the proposed enhancements incur negligible overheads.
Proceedings ArticleDOI
TransMem: A memory architecture to support dynamic remapping and parallelism in low power high performance CGRAs
TL;DR: TransMem is presented, a supporting memory infrastructure that complements the dynamic remapping and parallelism in the computational fabric and enhances the energy efficiency by up to 85% for the tested applications, compared to state of the art.
References
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