Proceedings ArticleDOI
Firm-core Virtual FPGA for Just-in-Time FPGA Compilation (abstract only)
Roman Lysecky,Kris Miller,Frank Vahid,Kees Vissers +3 more
- pp 271-271
TLDR
In this paper, the authors propose a virtual FPGA compiler for just-in-time (JIT) compilation of a standard hardware binary to enable standard software binaries to execute on different underlying processor architectures.Abstract:
Just-in-time (JIT) compilation has been used in many applications to enable standard software binaries to execute on different underlying processor architectures, yielding software portability benefits. We previously introduced the concept of a standard hardware binary to achieve similar portability benefits for hardware, using a JIT compiler to compile the hardware binary to an FPGA. Our JIT compiler includes lean versions of technology mapping, placement, and routing algorithms that implement the standard hardware binary on a simple custom FPGA fabric designed specifically for JIT compilation. While directly implementing a custom FPGA fabric on silicon may be feasible for some applications, we investigated the option of implementing the simple FPGA fabric as a circuit mapped to a physical FPGA - a virtual FPGA. We described our simple fabric in structural VHDL, synthesized the fabric onto a Xilinx Spartan-IIE FPGA, and mapped 18 benchmark circuits onto the resulting virtual FPGA. Our results show a 6X decrease in performance and a 100X increase in hardware resource usage for the virtual FPGA approach compared to mapping the circuits directly to the physical FPGA. For applications in which hardware portability is essential, a designer could leverage the large capacity of current commercially available FPGAs to implement a virtual FPGA with tens of thousands of configurable gates, providing about the same amount of configurable logic as FPGAs produced in the mid 1990s. Nevertheless, the large overheads clearly indicate the need to develop a virtual FPGA approach tuned to physical fabrics in order to reduce the overhead.read more
Citations
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Proceedings ArticleDOI
ZUMA: An Open FPGA Overlay Architecture
Alexander Brant,Guy G.F. Lemieux +1 more
TL;DR: ZUMA is an open-source, cross-compatible embedded FPGA architecture that is intended to overlay on top of an existing FPGAs, in essence an ”FPGA-on-an-FPGA.
Proceedings ArticleDOI
Sharing, protection, and compatibility for reconfigurable fabric with Amorphos
Ahmed Khawaja,Joshua Landgraf,Rohith Prakash,Michael Wei,Eric Schkufza,Christopher J. Rossbach +5 more
TL;DR: AMORPHOS is presented, which encapsulates user FPGA logic in morphable tasks, or Morphlets, which provides isolation and protection across mutually distrustful protection domains, extending the guarantees of software processes.
Journal ArticleDOI
A Survey on Coarse-Grained Reconfigurable Architectures From a Performance Perspective
TL;DR: There are ample opportunities for future research on Coarse-Grained Reconfigurable Architectures, in particular with respect to size, functionality, support for parallel programming models, and to evaluate more complex applications.
Book ChapterDOI
The LEAP FPGA operating system
TL;DR: This work presents the Latency-insensitive Environment for Application Programming (LEAP), an FPGA operating system built around latency-insensitivity communications channels, and presents an extensible interface for compile-time management of resources.
Proceedings ArticleDOI
Embedding FPGA overlays into configurable Systems-on-Chip: ReconOS meets ZUMA
TL;DR: This paper presents an embedding of a ZUMA-based virtual FPGA fabric into a complete configurable system-on-chip, and presents an open source tool flow to synthesize configurations for the virtual FGPA.