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FPGA-based software profiler for Hardware/Software co-design

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TLDR
A software profiler is proposed called AddressTracer, an adaptation of a non-intrusive, real time profiler called SnoopP that is accurately able to evaluate the performance matrices of any specific software function.
Abstract
Embedded systems are a mixture of software running on a microprocessor and application-specific hardware. Hardware/Software co-design requires an appropriate profiler to detect the functions that contribute to a large percentage of program execution. Software based profiling tools, such as the well-known GNU gprof profiler, integrates an extra code with the software program to be profiled causing a significant performance overhead. To address this issue, this paper proposes a software profiler called AddressTracer. This profiler is an adaptation of a non-intrusive, real time profiler called SnoopP. The AddressTracer is accurately able to evaluate the performance matrices of any specific software function. A software benchmark, Secure Hash Algorithm (SHA), is profiled using AddressTracer and other software profiling tools, Airwolf, and GNU software profiling tool (gprof), for a quantitative comparison and their performance overhead are studied. The achieved results show that AddressTracer provides accurate profiling results with no performance overhead. Airwolf causes a very low remarkable performance overhead compared with that incurred by gprof.

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References
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Proceedings ArticleDOI

MiBench: A free, commercially representative embedded benchmark suite

TL;DR: A new version of SimpleScalar that has been adapted to the ARM instruction set is used to characterize the performance of the benchmarks using configurations similar to current and next generation embedded processors.
Journal ArticleDOI

Reconfigurable computing: a survey of systems and software

TL;DR: The hardware aspects of reconfigurable computing machines, from single chip architectures to multi-chip systems, including internal structures and external coupling are explored, and the software that targets these machines is focused on.
Journal ArticleDOI

Hardware-software cosynthesis for microcontrollers

TL;DR: The authors present a software-oriented approach to hardware-software partitioning which avoids restrictions on the software semantics as well as an iterative partitioning process based on hardware extraction controlled by a cost function.
Journal ArticleDOI

Hardware-software cosynthesis for digital systems

TL;DR: The authors demonstrate the feasibility of synthesizing heterogeneous systems by using timing constraints to delegate tasks between hardware and software so that performance requirements can be met.
Journal ArticleDOI

A decade of hardware/software codesign

TL;DR: The term hardware/software codesign, coined about 10 years ago, describes a confluence of problems in integrated circuit design that tells us about the performance and energy consumption of single CPUs and multiprocessors.
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