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Journal ArticleDOI

Functional Cycles and Surface Mounting Attachment Reliability

W. Engelmaier
- 01 Feb 1985 - 
- Vol. 11, Iss: 3, pp 61-72
TLDR
The model reported here sidesteps the numerous complex underlying issues, which, if considered separately, make a predictive reliability model all but impossible, by taking a purely phenomenological approach and relegating second‐order effects to a lumped empirical figure of merit.
Abstract
One concern that has slowed the progress of surface mounted technology, in particular leadless chip carriers, has been the question of the reliability of the surface mount attachment technology. This concern follows from the realisation that the functional reliability of surface mount technology is a very complex issue involving many not very well understood components. What is needed is a relatively simple, useful, predictive model. The model reported here sidesteps the numerous complex underlying issues, which, if considered separately, make a predictive reliability model all but impossible, by taking a purely phenomenological approach and relegating second‐order effects to a lumped empirical figure of merit.

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Citations
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Journal ArticleDOI

Model for BGA and CSP reliability in automotive underhood applications

TL;DR: In this article, the reliability of fine-pitch plastic ball grid array (PBGA) packages has been evaluated in the automotive underhood environment, and the results showed that the CBGAs are more likely to fail at high T/sub g/ substrates with glass transition temperatures much higher than the 125/spl deg/C high temperature limit.
Journal ArticleDOI

Surface Mount Solder Joint Long‐term Reliability: Design, Testing, Prediction

TL;DR: An overview of the issues underlying surface mount solder joint long-term reliability is presented in this article, where state-of-the-art solutions for "Design for Reliability" in simple design tool form, discusses the important accelerated reliability test issues, and provides the equations to estimate the reliability of SM product in use as well as the expected cyclic life in accelerated tests.
Proceedings ArticleDOI

Impact of ball via configurations on solder joint reliability in tape-based, chip-scale packages

B.A. Zahn
TL;DR: In this paper, three-dimensional finite element analysis has been applied to determine the time-dependent solder joint fatigue response of a tape-based chip-scale package under accelerated temperature cycling conditions.
Journal ArticleDOI

Fatigue-strength prediction of microelectronics solder joints under thermal cyclic loading

TL;DR: In this paper, the stress-strain analyses for the solder joints in a thin single outline package (TSOP), a ball grid array (BGA) assembly, and a leadless ceramic chip carrier (LCCC) are carried out to investigate the plastic-creep behavior, and stress relaxation behavior due to the temperature cycling or isothermal cyclic loading.
Proceedings ArticleDOI

An efficient approach to predict solder fatigue life and its application to SM- and area array components

TL;DR: In this article, the authors describe theoretical predictions and experimental observations of solder fatigue in different Sn-63Pb-37 solder joints and demonstrate that the Coffin-Manson criterion has better predictive capabilities when the creep strain distribution within the joint and not only its maximum value.
References
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Book

Thermal Stress and Low Cycle Fatigue

TL;DR: In this article, thermal stress and low-cycle fatigue covering elastic stresses, plastic flow and creep, stress cycling, etc are discussed, and a text on low-cycled fatigue is presented.
Journal ArticleDOI

Reliability of controlled collapse interconnections

TL;DR: In this paper, an analysis of the mechanics of the system, a model to establish the relationship among different fatigue testing conditions, and experimental verification of the model were presented. And the chip failure rate of the interconnection as used in present designs was predicted to be better than 10-7%/1000 hours for the mechanism studied.
Journal ArticleDOI

Fatigue Life of Leadless Chip Carrier Solder Joints During Power Cycling

TL;DR: In this article, a method is described which provides estimates to first order of the number of either power or envirionmenta1 cyc1es 1eading to so1der joint fai1ure.
Journal ArticleDOI

Geometric optimization of controlled collapse interconnections

TL;DR: In this paper, the authors deal with the mechanical reliability of controlled collapse joints in modules subjected to the thermal fatigue conditions of machine usage, focusing on design variability and how the shape and dimensions of the joint and chip affect reliability.
Journal ArticleDOI

Thermal Deformations Observed in Leadless Ceramic Chip Carriers Surface Mounted to Printed Wiring Boards

TL;DR: In this article, the authors consider three modes of joint deformation, characterized by the dispacement of the pads (or lands) to which the solder is attached, and they use strain gauges and holographic interferometry to measure them.