Patent
Gas plasma vapor etching process
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TLDR
Gas plasma vapor etching process is used for removing portions of material from a semiconductor structure for a number of purposes including polishing and cleaning of the silicon wafers, finding pin holes in an insulating layer covering the semiconductor wafer and forming scribe lines in the wafer to thereafter permit the Wafer to be mechanically broken into dice without any substantial damage to the dice as mentioned in this paper.Abstract:
Gas plasma vapor etching process utilized for removing portions of material from a semiconductor structure for a number of purposes including polishing and cleaning of the silicon wafers, finding pin holes in an insulating layer covering the semiconductor wafer and forming scribe lines in the wafer to thereafter permit the wafer to be mechanically broken into dice without any substantial damage to the diceread more
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Journal ArticleDOI
Black silicon method X: a review on high speed and selective plasma etching of silicon with profile control: an in-depth comparison between Bosch and cryostat DRIE processes as a roadmap to next generation equipment
TL;DR: In this article, an intensive study has been performed to understand and tune deep reactive ion etch (DRIE) processes for optimum results with respect to the silicon etch rate, etch profile and mask etch selectivity.
Patent
Methods and devices for forming nanostructure monolayers and devices including such monolayers
TL;DR: In this paper, the methods for forming or patterning nanostructure arrays are provided, which involve formation of arrays on coatings comprising nanostructures association groups, forming of arrays in spin-on-dielectrics, solvent annealing after nanosturate deposition, patterning using resist, and/or use of devices that facilitate array formation.
Patent
Selective reactive ion etching of polysilicon against SiO2 utilizing SF6 -Cl2 -inert gas etchant
TL;DR: In this paper, an improved Reactive Ion Etch (RIE) technique for etching polysilicon or single crystal silicon is described. But it is not applicable to device processing in which micron or sub-micron sized lines must be fabricated to extremely close tolerances.
Patent
Method for dicing a semiconductor wafer
TL;DR: In this paper, a method and apparatus for dicing a semiconductor wafer using a plasma etch process is described, which is based on applying a patterned mask to the integrated circuits on a wafer.