Journal ArticleDOI
Global Flow Analysis in Automatic Logic Design
Trevillyan,Joyner,Berman +2 more
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TLDR
These methods involve linear time algorithms which extend the scope of local optimizations to the entire design of logic, which has resulted in a reduction in gate count, in improved control over path length, and in better detection and elimination of redundancy.Abstract:
This correspondence concerns applications of optimization techniques based on global flow analysis to the automated design of logic. Previous optimization work on logic design has relied primarily on either local transformations on the circuit graph or on the use of two-level Boolean minimization. Our methods involve linear time algorithms which extend the scope of local optimizations to the entire design. Their use, in some cases, has resulted in a reduction in gate count, in improved control over path length, and in better detection and elimination of redundancy.read more
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Proceedings ArticleDOI
DAGON: Technology Binding and Local Optimization by DAG Matching
TL;DR: A solution to the problem of technology binding in terms of matching patterns, describing technology specific cells and optimizations, against a technology independent circuit represented as a directed acyclic graph is offered in DAGON.
Journal ArticleDOI
Multilevel logic synthesis
TL;DR: A survey of logic synthesis techniques for multilevel combinational logic is presented to provide more in-depth background and perspective for people interested in pursuing or assessing some of the topics in this emerging field.
Journal ArticleDOI
Multi-level logic minimization using implicit don't cares
K. Bartlett,Robert K. Brayton,Gary D. Hachtel,R. Jacoby,C.R. Morrison,R.L. Rudell,Alberto Sangiovanni-Vincentelli,A. Wang +7 more
TL;DR: The authors introduce the concept of R-minimality, which implies minimality with respect to cube reshaping, and demonstrate the crucial role played by this concept in multilevel minimization.
Proceedings ArticleDOI
BOLD: The Boulder Optimal Logic Design system
Gary D. Hachtel,M. Lightner,K. Bartlett,D. Bostwick,R. Jacoby,P. Moceyunas,C.R. Morrison,X. Du,Eric M. Schwarz +8 more
TL;DR: The BOLD (Boulder-Optimal Logic Design) system is a set of software tools that optimally transform an arbitrary combinational logic description into a standard cell, gate array, or complex CMOS gate technology.
Journal ArticleDOI
EDA in IBM: past, present, and future
John A. Darringer,Edward S. Davidson,David J. Hathaway,B. Koenemann,Mark A. Lavin,J.K. Morrell,K. Rahmat,Wolfgang Roesner,E. Schanzenbach,Gustavo E. Tellez,Louise H. Trevillyan +10 more
TL;DR: A view of the future is presented, where the best methods of multimillion gate ASIC and gigahertz microprocessor design are converged to enable highly productive system-on-a-chip designs that include widely diverse hardware and software components.
References
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Journal ArticleDOI
A program data flow analysis procedure
Frances E. Allen,John Cocke +1 more
TL;DR: The global data relationships in a program can be exposed and codified by the static analysis methods described in this paper.
Journal ArticleDOI
Logic synthesis through local transformations
TL;DR: An experimental system for synthesizing synchronous combinational logic that allows a designer to start with a naive implementation produced automatically from a functional specification, evaluate it with respect to these many factors and incrementally improve this implementation by applying local transformations until it is acceptable for manufacture.
Journal ArticleDOI
Redundancy and Don't Cares in Logic Synthesis
TL;DR: The algorithm for redundancy removal described in this paper has been used successfully for both of the above purposes and achieves savings in computer resources at the expense of possibly failing to discover some redundancies.