Proceedings ArticleDOI
Half pitch 14 nm direct pattering with Nanoimprint lithography
Tetsuro Nakasugi,Takuya Kono,Kazuya Fukuhara,Masayuki Hatano,Hiroshi Tokue,Motofumi Komori,Hirotaka Tsuda,T. Komukai,K. Takahata,Hirokazu Kato,Kei Kobayashi,A. Mitra,Sachiko Kobayashi,S. Inoue,Tatsuhiko Higashiki,Takeharu Motokawa,Masanobu Saito,Shingo Kanamitsu,Masamitsu Itoh,T. Imamura,K. Matasunaga,Kohji Hashimoto,Yong-Taik Kim,J. Cho,Wooyung Jung +24 more
TLDR
In this paper, a nano-print lithography (NIL) technology including NIL system, template and resist process for half pitch (hp) 14 nm direct pattering was developed.Abstract:
We developed a nanoimprint lithography (NIL) technology including NIL system, template and resist process for half pitch (hp) 14 nm direct pattering. The latest NIL system NZ2C shows the mix and match overlay (MMO) of 3.4 nm ( $3\sigma$ ) and the template life around 125 lots. Throughput of 80 wafers per hour (wph) was demonstrated using throughput enhancement solutions, such as gas permeable spin-on-carbon (GP-SOC) and multi field dispense (MFD). The hp 14 nm template was fabricated by a self-aligned double patterning (SADP) on a template. Using this template, we fabricated hp 14 nm dense Si lines with a depth of 50 nm on a 300 mm wafer.read more
Citations
More filters
Proceedings ArticleDOI
Multi-field imprint technology: enabling the productivity enhancement of NIL
Tetsuro Nakasugi,Ryoichi Inanami,Kazuya Fukuhara,Motofumi Komori,Sadanori Arae,Soichi Inoue,Koji Hashimoto +6 more
TL;DR: In this article, the authors have developed Multi-Field Imprint (MFI) technology to improve the productivity of nano-imprint lithography (NIL) using the template having the imprinting size of 46 mm x 28 mm.
Proceedings ArticleDOI
Nanoimprint performance improvements for high volume semiconductor device manufacturing
Mitsuru Hiura,Yukio Takabayashi,Atsushi Kimura,Hiroshi Morohoshi,Yoshio Suzaki,Takahiro Matsumoto,Anshuman Cherala,Jin Choi +7 more
TL;DR: Improvements in overlay include control methods such as imprint force, mask to wafer tip/tilt and pneumatic controls at the wafer edge, and the pattern transfer scheme used to etch features with half pitches below 20nm.
Proceedings ArticleDOI
Template development for sub15nm nanoimprint lithography
Ryota Seki,Akihiko Ando,Takeharu Motokawa,Machiko Suenaga,Noriko Iida nee Sakurai,Ryu Komatsu,Masato Naka,Rikiya Taniguchi,Syuichi Taniguchi,Kazuki Hagihara,Masato Saito,Hideaki Sakurai,Ryoji Yoshikawa,Eiji Yamanaka,Shingo Kanamitsu +14 more
TL;DR: The current status of template development for sub15nm NIL is shown, double patterning technologies were applied to extend pattern resolution limit and high accuracy QA tools are required to qualify CD uniformity and defectivity which are key metrics on high-end template development.
Proceedings ArticleDOI
Nanoimprint edge placement error elements and control
Makoto Ogusu,Masaki Ishida,Masahiro Tamura,Keita Sakai,Toshiki Ito,Yuto Ito,Isao Kawata,Hideki Kunugi,Shuhei Tamura,Ryuichi Asano,Keisuke Tanaka,Tomohito Yamaji +11 more
TL;DR: In this paper , the performance improvements related to edge placement error (EPE) for NIL are reviewed and a roadmap for improving EPE to meet future generations of DRAM devices is presented.
Proceedings ArticleDOI
Fabrication of full-field 1z nm template using multi-beam mask writer (Conference Presentation)
TL;DR: This presentation is discussing master template fabrication process with multi-beam mask writer, MBMW and the performance of the template, and the replication process with a high resolution master.
References
More filters
Journal ArticleDOI
Nanoimprint lithography steppers for volume fabrication of leading-edge semiconductor integrated circuits.
TL;DR: The transition of a form of nanoimprint lithography technology, known as Jet and Flash Imprint Lithography (J-FIL), from research to a commercial fabrication infrastructure for leading-edge semiconductor integrated circuits (ICs) is discussed, including description of the high volume manufacturing stepper tools created for advanced memory manufacturing.
Journal ArticleDOI
Nanoimprint lithography and future patterning for semiconductor devices
TL;DR: In this article, the authors evaluated defect levels of NIL and classified defectivity into three categories; nonfill defects, template defects, and plug defects and proposed new materials for both the template and resist processes.
Proceedings ArticleDOI
Nanoimprint system development and status for high-volume semiconductor manufacturing
Tsuneo Takashima,Yukio Takabayashi,Naosuke Nishimura,Keiji Emoto,Takahiro Matsumoto,Tatsuya Hayashi,Atsushi Kimura,Jin Choi,Philip Schumaker +8 more
TL;DR: The FPA-1200NZ2C cluster system as mentioned in this paper is designed for high volume manufacturing of semiconductor devices, which includes a mask replication tool that can be used to produce replica masks with added residual image placement errors suitable for memory devices with half pitches smaller than 15nm.
Proceedings ArticleDOI
Nanoimprint system development for high-volume semiconductor manufacturing the and status of overlay performance
Yukio Takabayashi,Mitsuru Hiura,Hiroshi Morohoshi,Nobuhiro Kodachi,Tatsuya Hayashi,Atsushi Kimura,Takahiro Yoshida,Kazuhiko Mishima,Yoshio Suzaki,Jin Choi +9 more
TL;DR: In this paper, a high order distortion correction (HODC) system is introduced to address high order corrections, a combination of applying magnification actuation to the mask and temperature correction to the wafer is described in detail and examples are presented for the correction of K7, K11 and K17 distortions as well as distortions on actual device wafers.
Proceedings ArticleDOI
A study of filling process for UV nanoimprint lithography using a fluid simulation
Ikuo Yoneda,Yasutada Nakagawa,Shinji Mikami,Hiroshi Tokue,Takumi Ota,Takeshi Koshiba,Masamitsu Ito,Koji Hashimoto,Tetsuro Nakasugi,Tatsuhiko Higashiki +9 more
TL;DR: In this article, the authors analyzed the filling process using fluid simulation and found that the gas dissolution rate is the dominant parameter for filling time, while the resist properties and the environmental conditions such as atmosphere pressure play important roles.