Patent
JFET devices with increased barrier height and methods of making same
TLDR
In this article, the authors present devices and methods for providing JFET transistors with improved operating characteristics, such as a higher diode turn-on voltage and a doped silicon-carbide gate.Abstract:
Devices and methods for providing JFET transistors with improved operating characteristics are provided. Specifically, one or more embodiments of the present invention relate to JFET transistors with a higher diode turn-on voltage. For example, one or more embodiments include a JFET with a doped silicon-carbide gate, while other embodiments include a JFET with a metal gate. One or more embodiments also relate to systems and devices in which the improved JFET may be employed, as well as methods of manufacturing the improved JFET.read more
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Patent
Antifuse element using spacer breakdown
TL;DR: In this paper, techniques and circuitry for efficiently implementing programmable memory array circuit architectures, including both non-volatile and volatile memories, are described, and the memory circuitry employs an antifuse scheme that includes an array of IT bitcells, wherein each bitcell effectively contains one gate or transistor-like device that provides both an antifier element and a selector device for that bitcell.
Patent
Semiconductor element and manufacturing method thereof
TL;DR: In this paper, a semiconductor element consisting of a deep doping region, a well region with a second conductive type, a base body region, an insulated gate bipolar transistor and a metallic oxide semiconductor transistor is described.
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Power cell, power cell circuit for a power amplifier and a method of making and using a power cell
TL;DR: In this article, a power cell including an isolation region having a first dopant type formed in a substrate substrate and a bottom gate having a second dopant different from the first one formed on the isolation region and a channel layer having the first type formed on bottom gate.
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Method of producing semiconductor device
TL;DR: In this article, a method of producing a semiconductor device includes the following steps (A), (B), and (C) in order to produce the semiconductor epitaxial wafer including a body region.
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High electron mobility transistor
TL;DR: In this article, a high electron mobility transistor (HEMT) has a ratio of a first impedance to a second impedance that is a uniform value, where the first impedance is between the gate electrode and the channel depletion layer.
References
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Patent
Methods of forming semiconductor constructions
TL;DR: In this paper, the authors describe semiconductor constructions containing vertically-extending pillars, and methods for forming such constructions, which can be incorporated into transistor devices, and can contain verticallyextending channel regions of the transistor devices.
Patent
Highly scalable dynamic RAM cell with self-signal amplification
TL;DR: In this paper, a memory cell comprises a substrate of a first conductivity type (preferably N type) in which is formed a first region of opposite conductivities type.
Proceedings ArticleDOI
A SiC JFET driver for a 5 kW, 150 kHz three-phase PWM converter
TL;DR: In this article, a gate driver for the SiC JFET gate was proposed to improve the switching performance by operating the gate in avalanche mode during the off time, and the proposed gate driver was shown to have a better switching performance compared to the conventional conventional SiC gate drivers.
Patent
.beta.2-adrenergic receptor agonists
Edmund J. Moran,Seok-Ki Choi +1 more
TL;DR: In this article, multibinding compounds which are β2-adrenergic receptor agonists and are useful in the treatment and prevention of respiratory diseases such as asthma, bronchitis, and premature labor are disclosed.
Patent
Normally-off integrated JFET power switches in wide bandgap semiconductors and methods of making
Igor Sankin,Joseph Neil Merrett +1 more
TL;DR: In this paper, wide bandgap semiconductor devices including normally-off VJFET integrated power switches are described, which can be implemented monolithically or hybridly, and may be integrated with a control circuit built in a single- or multi-chip wide band gap power semiconductor module.