Patent
Low power clock circuit
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TLDR
In this article, a clock generator with complementary FET switches coupled between the output of the generator and power supply rails, and an inductor is presented. But the generator is operated at a frequency approximately equal to the resonant frequency of the inductor combined with the capacitance of the load.Abstract:
High-efficiency clock generator (10) circuits are disclosed having single or complementary outputs (Q) for driving capacitive loads (11). The clock generator has therein at least one pair of complementary FET switches (14,15) coupled between the output of the generator and power supply rails, and an inductor (13). The generator is operated at a frequency approximately equal the resonant frequency of the inductor combined with the capacitance of the load. Energy normally stored in the load and dissipated in the FETs as in conventional clock generators is instead stored in the inductor and returned to the loads for reuse.read more
Citations
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References
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