Patent
Method of forming capacitors and interconnect lines
TLDR
In this article, a multi-region material structure and process for forming capacitors and interconnect lines for use with integrated circuits is described, where the first electrode surfaces are formed by conversion of a conductive transition-metal nitride to an insulating transition metal oxide and formation of low-defect-density interfaces between capacitor second electrodes and the capacitor dielectric.Abstract:
A multi-region material structure and process for forming capacitors and interconnect lines for use with integrated circuits provides (1) capacitor first or bottom electrodes comprising a transition-metal nitride; (2) a capacitor dielectric comprising a transition-metal oxide; (3) capacitor second or top electrodes comprising a transition-metal nitride, a metal or multiple conductive layers; (4) one or more levels of interconnect lines; (5) electrical insulation between adjacent regions as required by the application; and (6) bonding between two regions when such bonding is required to achieve strong region-to-region adhesion or to achieve a region-to-region interface that has a low density of electrical defects. The process for forming the material structures involves formation of the capacitor dielectric on the first electrode surfaces by conversion of a conductive transition-metal nitride to an insulating transition-metal oxide and formation of low-defect-density interfaces between capacitor second electrodes and the capacitor dielectric.read more
Citations
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References
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Patent
Semiconductor memory device having stacked capacitor cells
TL;DR: In this article, the bit lines are shielded, the capacitance between bit lines decreases, and the memory array noise decreases, enabling the storage capacity portions to be arranged very densely and sufficiently large capacities to be maintained with very small cell areas.
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Process for fabricating capacitor for semiconductor storage device
TL;DR: In this article, the tantalum oxynitride film is produced by a chemical vapor deposition (CVD) process using a reactant gas containing a dialkylaminotantalum.
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Method of making semiconductor memory elements
TL;DR: In this paper, a method of making a semiconductor memory element such as in dynamic random access memories including forming a transistor on the semiconductor substrate, forming a polysilicon film, a metal silicide film and an oxide film, in this order, over the resultant entire exposed surface so as to form a bit line at the bit line contact, forming another oxide film and forming side wall spacers and a capacitor contact.