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Method of increasing field inversion threshold voltage and reducing leakage current and electrical noise in semiconductor devices

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TLDR
In this article, an annealing cycle stabilizes the semiconductor device by allowing an oxide-semiconductor interface region of the wafer to attain a minimum energy configuration, thereby reducing the surface-state charge density.
Abstract
A method for processing a semiconductor wafer to reduce electrical noise, to reduce the surface component of junction leakage current, to increase junction reverse breakdown voltage, and to increase field inversion voltage. Subsequent to last high temperature processing to which the semiconductor wafer is exposed in course of its manufacture, the semiconductor wafer is subjected to an annealing cycle in an inert ambient at a temperature in the range of 600 to 950 degrees Centigrade. At this point the semiconductor wafer has a field oxide thereon produced by prior processing operations. The annealing cycle stabilizes the semiconductor device by allowing an oxide-semiconductor interface region of the wafer to attain a minimum energy configuration, thereby reducing the surface-state charge density. The semiconductor wafer is then exposed to an oxidizing ambient for a short time to increase the oxide charge. At the end of the oxidizing procedure, the wafer is quenched to prevent reduction of the oxide charge by diffusion of the oxidizing species which create the oxide charge. The increased oxide charge increases the field inversion voltage. The semiconductor wafer is thus again subjected to an inert ambient, for restabilization. The semiconductor wafer is then subjected to a low temperature annealing cycle in a hydrogen ambient at a temperature in the range from 300 to 500 degrees Centigrade. The low temperature annealing step reduces the surface-state charge density without substantially decreasing the density of the oxide charge trapped in the field oxide, and therefore does not substantially lower the field inversion voltage.

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References
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Patent

Method for fabricating a silicon device utilizing ion-implantation and selective oxidation

TL;DR: A polycrystalline silicon layer is deposited by chemical vapor deposition method at a predetermined location on an oxide film grown by thermal oxidation on a surface of a monocrystal silicon substrate.
Patent

Method for making an extremely thin silicon oxide film

TL;DR: Gaseous oxygen vaporized from a liquid oxygen cooled by a refrigerant, such as liquid nitrogen, having a boiling point lower than that of liquid oxygen is guided into an oxidizing furnace along with an inert carrier gas so as to form an extremely thin oxide film on the surface of a silicon substrate which is placed in said oxidizing furnaces and maintained at a relatively high temperature as mentioned in this paper.
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Ion-free insulating layers

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