Journal ArticleDOI
Parallel Parsing Algorithms and VLSI Implementations for Syntactic Pattern Recognition
Y. T. Chiang,King-Sun Fu +1 more
TLDR
A parallel Earley's recognition algorithm in terms of an ``X*'' operator is presented, which can be executed on a triangular-shape VLSI array by restricting the input context-free grammar to be ¿-free, and which gives the correct error count.Abstract:
Earley's algorithm has been commonly used for the parsing of general context-free languages and the error-correcting parsing in syntactic pattern recognition The time complexity for parsing is 0(n3) This paper presents a parallel Earley's recognition algorithm in terms of an ``X*'' operator By restricting the input context-free grammar to be ?-free, the parallel algorithm can be executed on a triangular-shape VLSI array This array system has an efficient way of moving data to the right place at the right time Simulation results show that this system can recognize a string with length n in 2n + 1 system time We also present a parallel parse-extraction algorithm, a complete parsing algorithm, and an error-correcting recognition algorithm The parallel complete parsing algorithm has been simulated on a processor array which is similar to the triangular VLSI array For an input string of length n the processor array will give the correct right-parse at system time 2n + 1 if the string is accepted The error-correcting recognition algorithm has also been simulated on a triangular VLSI array This array recognizes an erroneous string of length n in time 2n + 1 and gives the correct error count These parallel algorithms are especially useful for syntactic pattern recognitionread more
Citations
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Proceedings Article
Parallel Parsing on a One-Way Array of Finite-State Machines.
TL;DR: It is shown that a one-way two-dimensional iterative array of finite-state machines (2-DIA) can recognize and parse strings of any context-free language in linear time.
Journal ArticleDOI
Parallel Parsing on a One-Way Array of Finite-State Machines
TL;DR: In this paper, it was shown that a one-way two-dimensional iterative array of finite-state machines (2-DIA) can recognize and parse strings of any context-free language in linear time.
Journal ArticleDOI
VLSI architectures for string matching and pattern matching
Heng-Da Cheng,King-Sun Fu +1 more
TL;DR: A VLSI architecture based on the space-time domain expansion approach which can compute the string distance and also give the matching index-pairs which correspond to the edit sequence is proposed and can obtain high throughput by using extensive pipelining and parallelism.
Proceedings Article
The CYK approach to serial and parallel parsing
TL;DR: Traditional parsing methods for general context-free grammars have been re-investigated in order to see whether they can be adapted to a parallel processing view.
Proceedings ArticleDOI
An FPGA-based coprocessor for the parsing of context-free grammars
TL;DR: This paper presents an FPGA-based implementation of a co-processing unit able to parse context-free grammars of real-life sizes that can be used for programming language syntactic analysis and natural language applications where parsing speed is an important issue.
References
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Book
The Theory of Parsing, Translation, and Compiling
Alfred V. Aho,Jeffrey D. Ullman +1 more
TL;DR: It is the hope that the algorithms and concepts presented in this book will survive the next generation of computers and programming languages, and that at least some of them will be applicable to fields other than compiler writing.
Journal ArticleDOI
General context-free recognition in less than cubic time
TL;DR: An algorithm for general context-free recognition is given that requires less than n3 time asymptotically for input strings of length n.
Book Chapter
Let's Design Algorithms for VLSI Systems
TL;DR: Examples of algorithms that are suitable for VLSI implementation are given, a taxonomy for algorithms based on their communication structures is provided, and some of the insights that are beginning to emerge from efforts in designing algorithms for V LSI systems are discussed.
Journal ArticleDOI
The Design of Special-Purpose VLSI Chips
TL;DR: Structured VLSI design proceeds from algorithm to logic cell to cell array to special-purpose chip, yielding cheap, powerful, and modular hardware that will permanently alter the systems landscape of the 80's.
Book Chapter
Direct VLSI Implementation of Combinatorial Algorithms
TL;DR: New algorithms for dynamic programming and transtivc closure are presented which are appropriate for very large-scale integration implementation and are shown to be suitable for dynamic integration implementation.