Proceedings ArticleDOI
Radix-2 2 based low power reconfigurable FFT processor
Gin-Der Wu,Yi-Ming Liu +1 more
- pp 1134-1138
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TLDR
A radix-22 based reconfigurable FFT processor is proposed that gets the optimal balance between flexibility and power consumption and has the advantage of low power.Abstract:
Fast Fourier Transform (FFT) is widely applied in the speech processing, image processing, and communication system. To implement it, a radix-22 based reconfigurable FFT processor is proposed in this paper. This architecture gets the optimal balance between flexibility and power consumption. Power saving is achieved by using the appropriate FFT size instead of a fixed large FFT size. The memory-based architecture is used to design our reconfigurable FFT processor. It can be configured to different size which ranges from 16 to 256 points. In our experiments, the proposed architecture has the advantage of low power.read more
Citations
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Journal ArticleDOI
Automatic IP generation of FFT/IFFT processors with word-length optimization for MIMO-OFDM systems
TL;DR: Experimental results demonstrate that the proposed IP generator indeed provides FFT IPs which meet the requirements and are more suitable in recent MIMO-OFDM communication standards/drafts than some conventional FFTIP generators.
Journal ArticleDOI
Low power reconfigurable FP-FFT core with an array of folded DA butterflies
TL;DR: A variable length (32 ~ 2,048), low power, floating point fast Fourier transform (FP-FFT) processor is designed and implemented using energy-efficient butterfly elements using distributed arithmetic (DA) algorithm that eliminates the power-consuming complex multipliers.
Journal ArticleDOI
Book Review: Digital Signal Processing, Theory and Application of Digital Processing
TL;DR: A nota sobre la aplicación de los metodos operacionales a ciertos problemas no lineales as discussed by the authors demuestra que the teorfa ordinaria de la transforrnacion de Laplace is, muy a menudo, adecuada for esa labor, and incluso resulta superior in muchos of esos problema.
Proceedings ArticleDOI
Memory-bank based radix-2 2 fast fourier transform
TL;DR: A memory-bank based reconfigurable radix-22 Fast Fourier Transform (FFT) is proposed and it is very suitable to be applied in the speech processing, image processing, and communication system.
References
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Journal ArticleDOI
Pipeline and Parallel-Pipeline FFT Processors for VLSI Implementations
TL;DR: VLSI implementations have constraints which differ from those of discrete implementations, requiring another look at some of the typical FFT'algorithms in the light of these constraints.
Proceedings ArticleDOI
Design and implementation of a 1024-point pipeline FFT processor
Shousheng He,M. Torkelson +1 more
TL;DR: By exploiting the spatial regularity of the new algorithm, minimal requirement for both dominant components in VLSI implementation has been achieved: only 4 complex multipliers and 1024 complex-word data memory for the pipelined 1K FFT processor.
Journal ArticleDOI
Efficient VLSI architectures for fast computation of the discrete Fourier transform and its inverse
TL;DR: Two new VLSI architectures for computing the N-point discrete Fourier transform (DFT) and its inverse (IDFT) based on a radix-2 fast algorithm, where N is a power of two are proposed.
Proceedings ArticleDOI
A low-power and domain-specific reconfigurable FFT fabric for system-on-chip applications
TL;DR: This FFT fabric is characterized by having dynamic reconfigurability while incurring only a 12 /spl sim/ 19% increase in energy consumption, and requiring 14% more area than a 1024-point non-reconfigurable F FT fabric.
Proceedings ArticleDOI
A Block Scaling FFT/IFFT Processor for WiMAX Applications
Yuan Chen,Yu-Wei Lin,Chen-Yi Lee +2 more
TL;DR: A novel block scaling method and a new ping-pong cache-memory architecture are proposed to reduce the power consumption and hardware cost and by proper scheduling of the two data streams, the proposed design achieves better hardware utilization.