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Read Only Memory

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The article was published on 1998-01-01 and is currently open access. It has received 4 citations till now. The article focuses on the topics: Computer memory & Read-only memory.

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Citations
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Journal ArticleDOI

How well does a telephone questionnaire measure drinking water intake

TL;DR: This data indicates that drinking water intake estimations are likely to be reliable in the absence of any evidence of contamination in the drinking water supply.
Proceedings ArticleDOI

SSTL I/O Standard based environment friendly energyl efficient ROM design on FPGA

TL;DR: This work is operating ROM with the highest operating frequency of 4th generation i7 processor to test the compatibility of this design with the latest hardware in use, using Verilog hardware description language, Virtex-6 FPGA, and Xilinx ISE simulator.
Proceedings ArticleDOI

Low Power High Performance ROM Design on FPGA Using LVDCI I/O Standard

TL;DR: This work is using LVDCI I/O standard in energy efficient ROM design on FPGA using Verilog hardware description language and Xilinx ISE simulator to reduce IO power and reduce total power.

Problem Analysis and Recommendations of Memory Contents in High School Informatics Textbooks

TL;DR: It is suggested that it is appropriate to exclude virtual memory in textbooks considering its complexity, and it is inappropriate to include ROM in main memory from the memory hierarchy perspective.
References
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Journal ArticleDOI

How well does a telephone questionnaire measure drinking water intake

TL;DR: This data indicates that drinking water intake estimations are likely to be reliable in the absence of any evidence of contamination in the drinking water supply.
Proceedings ArticleDOI

SSTL I/O Standard based environment friendly energyl efficient ROM design on FPGA

TL;DR: This work is operating ROM with the highest operating frequency of 4th generation i7 processor to test the compatibility of this design with the latest hardware in use, using Verilog hardware description language, Virtex-6 FPGA, and Xilinx ISE simulator.
Proceedings ArticleDOI

Low Power High Performance ROM Design on FPGA Using LVDCI I/O Standard

TL;DR: This work is using LVDCI I/O standard in energy efficient ROM design on FPGA using Verilog hardware description language and Xilinx ISE simulator to reduce IO power and reduce total power.

Problem Analysis and Recommendations of Memory Contents in High School Informatics Textbooks

TL;DR: It is suggested that it is appropriate to exclude virtual memory in textbooks considering its complexity, and it is inappropriate to include ROM in main memory from the memory hierarchy perspective.