Proceedings ArticleDOI
Realization of area efficient QR factorization using unified division, square root, and inverse square root hardware
Semih Aslan,Erdal Oruklu,Jafar Saniie +2 more
- pp 245-250
TLDR
Unified hardware architecture for fast, area efficient QR factorization based on the Householder transformation is presented and the design and implementation of the proposed hardware is presented with synthesis results based on FPGA hardware.Abstract:
The QR factorization is used in many signal processing and communication applications such as echo cancellation, adaptive beamforming and multiple-inputmultiple- output (MIMO) systems. However, division, square root and inverse square root operations required by the QR algorithm are very difficult to implement because they are computationally slow and area-consuming arithmetic operations. This paper presents unified hardware architecture for fast, area efficient QR factorization based on the Householder transformation. Newton-Raphson, and Goldschmidt algorithms are used for fast division, square root and inverse square root blocks. By using a unified architecture, area and power requirements for QR factorization are reduced without decreasing overall speed. The design and implementation of the proposed hardware is presented with synthesis results based on FPGA hardware.read more
Citations
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Proceedings ArticleDOI
FPGA implementation of fast QR decomposition based on givens rotation
TL;DR: An improved fixed-point hardware design of QR decomposition, specifically optimized for Xilinx FPGAs is introduced, and a Givens Rotation algorithm is implemented by using a folded systolic array and the CORDIC algorithm, making this very suitable for high-speed FPGA or ASIC designs.
Journal ArticleDOI
Stress Recognition from Heterogeneous Data
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Algorithm, Architecture, and Floating-Point Unit Codesign of a Matrix Factorization Accelerator
TL;DR: This paper examines the mapping of algorithms encountered when solving dense linear systems and linear least-squares problems to a custom Linear Algebra Processor and exposes the benefits of redesigning floating point units and their surrounding data-paths to support these complicated operations.
Proceedings ArticleDOI
Floating Point Architecture Extensions for Optimized Matrix Factorization
TL;DR: This paper examines the mapping of algorithms encountered when solving dense linear systems and linear least-squares problems to a custom Linear Algebra Processor and exposes the benefits of redesigning floating point units and their surrounding data-paths to support these complicated operations.
Journal ArticleDOI
NoC-Based FPGA Acceleration for Monte Carlo Simulations with Applications to SPECT Imaging
P. J. Kinsman,Nicola Nicolici +1 more
TL;DR: This paper presents a compute architecture for accelerating Monte Carlo simulations based on the Network-on-Chip (NOC) paradigm for on-chip communication and demonstrates through the complete implementation of a Monte Carlo-based image reconstruction algorithm for Single-Photon Emission Computed Tomography (SPECT) imaging that this complex problem can be accelerated by two orders of magnitude.
References
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Book
Digital arithmetic
Milo D. Ercegovac,Toms Lang +1 more
TL;DR: Digital Arithmetic, two of the field's leading experts, deliver a unified treatment of digital arithmetic, tying underlying theory to design practice in a technology-independent manner, to develop sound solutions, avoid known mistakes, and repeat successful design decisions.
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TL;DR: A taxonomy of division algorithms is presented which classifies the algorithms based upon their hardware implementations and impact on system design, finding that, for low-cost implementations where chip area must be minimized, digit recurrence algorithms are suitable.
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Improving Goldschmidt division, square root, and square root reciprocal
TL;DR: The aim of this paper is to accelerate division, square root, and square root reciprocal computations when the Goldschmidt method is used on a pipelined multiplier by replacing the last iteration by the addition of a correcting term that can be looked up during the early iterations.
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