Simplification of Toffoli networks via templates
Dmitri Maslov,Gerhard W. Dueck,D.M. Miller +2 more
- pp 53-58
TLDR
All templates for m/spl les/7 are described in this paper and a transformation reducing the gate count can be applied via template matching.Abstract:
Reversible logic functions can be realized as networks of Toffoli gates. The synthesis of Toffoli networks can be divided into two steps. First, find a network that realizes the desired function. Second, transform the network such that it uses fewer gates, while realizing the same function. This paper addresses the second step. Transformations are accomplished via template matching. The basis for a template is a network with m gates that realizes the identity function. If a sequence in the network to be synthesized matches more than half of a template, then a transformation reducing the gate count can be applied. All templates for m ≤ 7 are described in this paper. are described in this paper.read more
Citations
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Journal ArticleDOI
An Algorithm for Synthesis of Reversible Logic Circuits
TL;DR: The algorithm uses the positive-polarity Reed-Muller expansion of a reversible function to synthesize the function as a network of Toffoli gates, and is able to quickly synthesize all four-variable and most five-variable reversible functions that were in the test suite.
Journal ArticleDOI
Toffoli network synthesis with templates
TL;DR: A basic method and a bidirectional synthesis algorithm which produces a network of Toffoli gates realizing a given reversible specification, and an asymptotically optimal modification of the basic synthesis algorithm employing generalized mEXOR gates is presented.
Book
Multiple-Valued Logic: Concepts and Representations
TL;DR: A survey of the use of multiple-valued logic in several modern application areas including electronic design automation algorithms and circuit design and the mathematical basis and concepts of various algebras and systems of multiple valued logic are provided.
Proceedings ArticleDOI
A new heuristic algorithm for reversible logic synthesis
TL;DR: This paper proposes an approach to reversible logic synthesis using a new complexity measure based on shared binary decision diagrams with complemented edges (instead of truth tables or PPRM forms), which can be used with arbitrary libraries of reversible logic gates and arbitrary cost functions.
Proceedings ArticleDOI
Quantum Circuit Simplification Using Templates
TL;DR: This work considers the use of templates to simplify a quantum circuit initially found by other means, and presents and analyzes templates in the general case, and provides particular details for circuits composed of NOT, CNOT and controlled-sqrt-of-NOT gates.
References
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