Patent
SRAM with local interconnect
TLDR
In this article, an SRAM using TiN local interconnects was proposed to reduce the moat parasitic capacitance and avoid the use of metal jumpers, resulting in increased density.Abstract:
An SRAM using TiN local interconnects. This permits the moat parasitic capacitance to be reduced, and also avoids use of metal jumpers, resulting in increased density.read more
Citations
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Patent
Semiconductor device, and manufacturing method thereof
TL;DR: In this article, the oxide semiconductor film has at least a crystallized region in a channel region, which is defined as a region of interest (ROI) for a semiconductor device.
Patent
Cell circuit and layout with linear finfet structures
TL;DR: In this paper, a cell circuit and corresponding layout is disclosed to include linear-shaped diffusion fins defined to extend over a substrate in a first direction so as to extend parallel to each other.
Patent
Methods for multi-wire routing and apparatus implementing same
Daryl Fox,Scott T. Becker +1 more
TL;DR: In this article, a rectangular interlevel connector array (RICA) is defined in a semiconductor chip, where a virtual grid for inter-level connector placement is defined to include a first set of parallel virtual lines that extend across the layout in a first direction, and a second set of Parallel Virtual Lines (RLs) that extend along a parallel virtual line in a second direction perpendicular to the first direction.
Patent
Methods for cell phasing and placement in dynamic array architecture and implementation of the same
TL;DR: In this paper, a logic block area is defined to include a first chip level where layout features are placed according to a first virtual grate, and a second chip level in which layout feature are placed based on a second virtual grate.
Patent
CMOS-compatible MEM switches and method of making
Lap-Wai Chow,Tsung-Yuan Hsu,Daniel J. Hyman,Robert Y. Loo,Paul Ouyang,James H. Schaffner,Adele E. Schmitz,Robert N. Schwartz +7 more
TL;DR: In this paper, a microelectromechanical (MEM) switch is fabricated inexpensively by using processing steps which are standard for fabricating multiple metal layer integrated circuits, such as CMOS.
References
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Book
Silicides for VLSI applications
TL;DR: This paper presents a meta-analysis of the physical properties of the Higgs boson gas molecule and its application in integrated circuit fabrication.
Patent
Method of producing titanium nitride MOS device gate electrode
TL;DR: An MOS device having a gate electrode and interconnect of titanium nitride and especially Titanium nitride which is formed by low pressure chemical vapor deposition is described in this paper, where the gate electrode has a silicon layer thereover to improve oxidation protection.
Journal ArticleDOI
Applications of TiN thin films in silicon device technology
M. Wittmer,H. Melchior +1 more
TL;DR: The barrier height of TiN on n-type silicon was found to be 0.49 V, allowing the fabrication of low barrier Schottky diodes on high resistivity material and good ohmic contacts to low resistivity n- and p-type material as discussed by the authors.
Journal ArticleDOI
Development of the Self-Aligned Titanium Silicide Process for VLSI Applications
TL;DR: Comparison of circuit yield data and test structure parameters from devices fabricated with and without the silicidation process has demonstrated that the self-aligned silicide process is compatible with both VLSI NMOS and CMOS technologies.
Patent
Forming low-resistance contact to silicon
Moshe Eizenberg,Shyam P. Murarka +1 more
TL;DR: In this paper, a titanium-rich carbide film deposited on silicon produces, in a single processing step, both a stable titanium silicide contact and a titanium carbide diffusion barrier between the silicide and a subsequently formed overlying layer of aluminum.