Patent
Technique for forming a passivation layer prior to depositing a barrier layer in a copper metallization layer
TLDR
By performing a wet chemical process after etching a via, contaminations may be removed and a thin passivation layer may be formed that may then be readily removed in a subsequent sputter etch process for forming a barrier/adhesion layer as discussed by the authors.Abstract:
By performing a wet chemical process after etching a via, contaminations may be removed and a thin passivation layer may be formed that may then be readily removed in a subsequent sputter etch process for forming a barrier/adhesion layer. In a particular embodiment, the wet chemical process may be performed on the basis of fluoric acid and triazole or a compound thereof.read more
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System comprising a semiconductor device and structure
Zvi Or-Bach,Brian Cronquist,Israel Beinglass,Jan Lodewijk de Jong,Deepak C. Sekar,Zeev Wurman +5 more
TL;DR: In this article, a system includes a semiconductor device consisting of a first single crystal silicon layer comprising first transistors, first alignment marks, and at least one metal layer overlying the first single-crystalline silicon layer.
Patent
Semiconductor device and structure
Zvi Or-Bach,Brian Cronquist +1 more
TL;DR: In this paper, a first layer and a second layer of layer-transferred mono-crystallized silicon, where the first layer comprises a first plurality of horizontally-oriented transistors, and the second layer includes a second plurality of vertically oriented transistors.
Patent
Method for fabrication of a semiconductor device and structure
TL;DR: In this article, a method to process an Integrated Circuit device including processing a first layer of first transistors, then processing a metal layer overlaying the first layer and providing at least one connection to the first Transistors, and finally processing a second layer of second transistors overlaying a first metal layer, wherein the second metal layer is connected to provide power to at least 1 of the second Transistors.
Patent
Method for Fabricating Semiconductor Device
TL;DR: In this article, a method for fabricating a semiconductor device, in which a lifting phenomenon can be prevented from occurring in forming an amorphous carbon film on an etched layer having tensile stress, was proposed.
Patent
3D semiconductor device and structure
TL;DR: In this article, an Integrated Circuit device including a first layer including first single crystal transistors; a second layer overlaying the first layer, the second layer including second single-crystal transistors, where the second-layer thickness is less than one micron, where a plurality of the first transistors is circumscribed by a first dice lane of at least 10 microns width, and there are no first conductive connections to the plurality of transistors that cross the first-dice lane.
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Patent
Method for improving nucleation and adhesion of CVD and ALD films deposited onto low-dielectric-constant dielectrics
TL;DR: In this paper, a low-k organic polymer dielectric layer or an organic-doped oxide (ODO) layer having a reactive component is formed over the substrate, which is then processed to produce polar groups or polar sites at least on a surface of the formed layer.
Patent
Photoresist stripping solution and a method of stripping photoresists using the same
Shigeru Yokoi,Kazumasa Wakiya +1 more
TL;DR: A photoresist stripping solution consisting of carboxyl group-containing acidic compound, at least one basic compound (for example, monoethanolamine, tetraalkylammonium) selected from among alkanolamines and specific quaternary ammonium hydroxides, a sulfur-containing corrosion inhibitor and water, and having a pH value of 3.5-5.5 was proposed in this paper.
Patent
Aqueous fluoride compositions for cleaning semiconductor devices
TL;DR: In this article, dilute fluoride solutions and methods for cleaning plasma etch residue from semiconductor substrates including such dilute solutions are presented and the compositions and methods according to the invention can advantageously provide both cleaning efficiency and material compatibility.
Patent
Cleaning composition for removing resists and method of manufacturing semiconductor device
Itaru Kanno,Yasuhiro Asaoka,Masahiko Higashi,Yoshiharu Hidaka,Etsuro Kishio,Tetsuo Kawasaki Aoyama,Tomoko Suzuki,Toshitaka Kawasaki Hiraga,Toshihiko Nagai +8 more
TL;DR: The cleaning composition for removing resists includes a salt of hydrofluoric acid and a base not containing a metal (A component), a water-soluble organic solvent (B1 component), at least one acid selected from a group consisting of organic acid and inorganic acid (C component), water (D component), and optionally an ammonium salt (E1 component).
Patent
Method of cleaning a dual damascene structure
Chih-Ning Wu,Sun-Chieh Chien +1 more
TL;DR: In this article, a dual damascene opening is formed in the dielectric layer and the cap layer, exposing the first metal layer, and then a post-etching cleaning step is carried out to clean the dual damASCene opening, and there are two types of cleaning methods.