Proceedings ArticleDOI
The Collaborative Design for the Package of High - speed Interface Chip
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TLDR
This research takes an actual DDR3 controller package design as the background, and the chip adopts advanced packaging collaborative design, including die-package-PCB collaboration design and design-simulation collaboration design.Abstract:
In order to meet people's demand for multi-function and miniaturization of electronic products, the integration degree of electronic products is constantly improving and the speed is getting faster and faster. The research takes an actual DDR3 controller package design as the background. And the chip adopts advanced packaging collaborative design, including die-package-PCB collaboration design and design-simulation collaboration design. Packaging is evaluated in terms of electrical integrity, thermal mechanical properties, manufacturability, testability and so on during package.read more
Citations
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Proceedings ArticleDOI
Signal Integrity Design Methodology for Package in Co-packaged Optics Based on Figure of Merit as Channel Operating Margin
TL;DR: In this paper, the authors proposed a signal integrity (SI) design methodology for package of co-packaged optics (CPO) by using channel operating margin (COM) as a figure of merit (FOM) for the first time.
References
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Proceedings ArticleDOI
Shielding effectiveness modeling and measurement of multiple layers conformal shielding on system-in-package (SiP) module
TL;DR: In this article, generic equivalent transmission line method is proposed to deal with both metal and dielectric materials for multiple layer shielding solutions, which is easy to implement by using arbitrary cascade network analysis.
Proceedings ArticleDOI
An empirical study of performance and power scaling of low voltage DDR3
TL;DR: In this article, the scaling of signal integrity performance and power consumption at full system level was demonstrated. And the impact of DRAM power consumption on mobile notebook average and self-refresh power was examined.
Journal ArticleDOI
Shielding evaluation of on-package conformal shields by numerical modelling and experimental measurement
TL;DR: In this paper, a reliable numerical modeling for shielding evaluation of on-package conformal shields based on the integrated circuit (IC)-stripline method is presented, where the effects of the number of grounding pads and the thickness of a conformal shield on the shielding performance are investigated.