Patent
Two-stage weighted capacitor circuit for analog-to-digital and digital-to-analog converters
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TLDR
In this paper, a two-stage weighted capacitor network for use as an analog-to-digital or digital-toanalog converter is described, where a high gain amplifier connected as an inverting amplifier with a 2C capacitor feedback path is connected to the capacitor ladder.Abstract:
A two-stage weighted capacitor network for use as an analog-to-digital or digital-to-analog converter is described. A capacitor ladder is included having two similar groups of capacitors connected in parallel. In each group the parallel capacitors have values starting with value C and decreasing in binary fractional amounts C/2 1 , C/2 2 , C/2 3 , C/2 4 etc. to C/2 n-1 . The two groups are interconnected through a coupling capacitor of value C/2 n-1 and each of the capacitors in the two groups are selectively connected through switches to either a reference voltage or ground potential. A high gain amplifier connected as an inverting amplifier with a 2C capacitor feedback path is connected to the capacitor ladder. When the circuit is used in a digital-to-analog converter, the 2C capacitor is reset and then the digital input pattern, consisting of 2n bits, is manifested by connecting the capacitor ladder switches to the ground potential for "1" bits and leaving the other switches connected to the reference potential for "0" bits. When the circuit is used in an analog-to-digital converter the output of the amplifier is connected to a comparator which serves as a polarity detector and which feeds a set of control logic. The control logic then sets the switches, which were originally all connected to the analog voltage, in a binary search mode.read more
Citations
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References
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Patent
Digital-to-analog converter circuit
Tetsuo Ando,Hiroyuki Matsumoto +1 more
TL;DR: In this paper, a circuit for converting binary-coded number signals into analog voltages is described. But the circuit is not suitable for the use of binary numbers. And the number signals are transmitted through individual switching means to charge separate charge storage elements, the quantity of charge being weighted according to the position of the digit in the number.
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TL;DR: A digital voltage level measuring device includes an amplifier having a capacitive feedback the output voltage of which is brought to a value dependent upon the integration result reached within a given interval of time of a voltage to be measured as discussed by the authors.
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TL;DR: In this paper, a high speed digital to analog converter which utilizes capacitors is described, where a capacitor ladder network in combination with switching means for selectively excluding individual ones of the capacitors from the network depending upon the parallel binary input signal information present is determinative of the analog output signal.