Showing papers on "Blackfin published in 2007"

PrivacyCam: a Privacy Preserving Camera Using uCLinux on the Blackfin DSP

Abstract: Considerable research work has been done in the area of surveillance and biometrics, where the goals have always been high performance, robustness in security and cost optimization With the emergence of more intelligent and complex video surveillance mechanisms, the issue of "privacy invasion" has been looming large Very little investment or effort has gone into looking after this issue in an efficient and cost-effective way The process of PICO (privacy through invertible cryptographic obscuration) is a way of using cryptographic techniques and combining them with image processing and video surveillance to provide a practical solution to the critical issue of "privacy invasion" This paper presents the idea and example of a realtime embedded application of the PICO technique, using uCLinux on the tiny Blackfin DSP architecture, along with a small Omnivision camera It demonstrates how the practical problem of "privacy invasion" can be successfully addressed through DSP hardware in terms of smallness in size and cost optimization After review of previous applications of "privacy protection", and system components, we discuss the "embedded jpeg-space" detection of regions of interest and the real time application of encryption techniques to improve privacy while allowing general surveillance to continue The resulting approach permits full access (violation of privacy) only by access to the private-key to recover the decryption key, thereby striking a fine trade-off among privacy, security, cost and space

Exploring Tradeoffs in Accuracy, Energy and Latency of Scale Invariant Feature Transform in Wireless Camera Networks

Abstract: Advances in DSP technology create important avenues of research for embedded vision. One such avenue is the investigation of tradeoffs amongst system parameters which affect the energy, accuracy, and latency of the overall system. This paper reports work on benchmarking the performance and cost of scale invariant feature transform (SIFT) for visual classification on a Blackfin DSP processor. Through measurements and modeling of the camera sensor node, we investigate system performance (classification accuracy, latency, energy consumption) in light of image resolution, arithmetic precision, location of processing (local vs. server-side), and processor speed. A case study on counting eggs during avian nesting season is used to experimentally determine the tradeoffs of different design parameters and discuss implications to other application domains.

Stream image processing on a dual-core embedded system

Abstract: Effective memory utilization is critical to reap the benefits of the multi-core processors emerging on embedded systems. In this paper we explore the use of a stream model to effectively utilize memory hierarchies.We target image processing algorithms running on the Analog Devices Blackfin BF561 fixedpoint, dual-core DSP. Using optimized assembly to effectively use cores reduces runtime, but also underscores the need to mitigate the memory bottleneck. Like other embedded processors, the Blackfin BF561 has L2 SRAM available. Applying the stream model allows us to effectively make full use of both cores and the L2 SRAM. We achieve almost a 10X speedup in execution time compared to non-optimized C code.

Introducing the Blackfin Handy Board

Abstract: The Blackfin Handy Board is a new robot controller inspired by the original MIT Handy Board. The Blackfin Handy Board was developed in collaboration with Analog Devices, Inc., and is based on their Blackfin DSP chip, which combines a 16-bit integer DSP engine with a 32-bit RISC CPU. This paper provides an overview of the architecture of the Blackfin Handy Board, including the hardware design and supported software environments, and results from the Fall 2006 semester of use.

System Optimization Techniques for Blackfin® Processors

Abstract: Copyright 2007, Analog Devices, Inc. All rights reserved. Analog Devices assumes no responsibility for customer product design or the use or application of customers’ products or for any infringements of patents or rights of others which may result from Analog Devices assistance. All trademarks and logos are property of their respective holders. Information furnished by Analog Devices applications and development tools engineers is believed to be accurate and reliable, however no responsibility is assumed by Analog Devices regarding technical accuracy and topicality of the content provided in Analog Devices Engineer-to-Engineer Notes. Introduction

Interfacing Atmel® Fingerprint Sensor AT77C104B with Blackfin® Processors

Abstract: Copyright 2007, Analog Devices, Inc. All rights reserved. Analog Devices assumes no responsibility for customer product design or the use or application of customers’ products or for any infringements of patents or rights of others which may result from Analog Devices assistance. All trademarks and logos are property of their respective holders. Information furnished by Analog Devices applications and development tools engineers is believed to be accurate and reliable, however no responsibility is assumed by Analog Devices regarding technical accuracy and topicality of the content provided in Analog Devices Engineer-to-Engineer Notes. Introduction

Embedded Low Complexity JPEG2000 Videocoding System

Abstract: In this paper, we discuss an embedded hardware low complexity JPEG2000 video coding system. The hardware implementation is based on a software simulation system, where temporal redundancy is exploited by coding of differential frames which are arranged in an adaptive GOP structure. The hardware used mainly consists of a microprocessor (Analog Devices ADSP- BF533 Blackfin Processor) and a JPEG2000 chip (ADV202). DMAs (direct memory access) are introduced to optimize memory transfers in the system. It is shown that memory to memory DMAs lead to significant improvement in our proposed memory structure resulting in better performance.

Face Detection by DSP Using Directly Connected Camera

Abstract: This work deals with face detection with using of directly connected camera to signal processor Blackfin (produced by Analog Devices). This work consists of description of interconnection between monochromatic camera KAC-9618 and DSP processor Blackfin BF-537. An algorithm of face detection and algorithm for communication between camera and DSP are also included. First of them is based on using of backpropagation neural network. Camera is controlled by setting values of its registers via I2C serial bus. In addition, there is an overview of used neural network.

Cache-Efficient Implementation of FIR Filters using the Blackfin Microcomputer

Abstract: The paper presents a cache efficient scheme for very long length finite impulse response (FIR), namely extreme filter, using the analog devices Blackfin microcomputer and investigates the maximum filter length which allows a real time implementation with the assumptions that a switching buffer technique is involved. Using this efficient cache scheme the FIR length may be increased up to tens hundreds and the implementation remains still a real time one.

Optimized Math Functions for a Fixed-Point DSP Architecture

Abstract: This paper presents a method for implementing several high-performance math functions through polynomial approximation on the fixed-point Blackfin ADSP-BF533 architecture. We present a strategy to overcome the performance given by the Blackfin 's C library using a fast emulated floating-point format. We also discuss the methods applied to generate the polynomial approximation for the sine, logarithmic, and exponential functions, as well as the optimization schemes used to implement these functions. This work contributed to a maximum cycle reduction of 85% over the standard math library.

RealTime DSP Fundamentals and Implementation Considerations

Abstract: This chapter contains sections titled: Number Formats Used in the Blackfin Processor Dynamic Range, Precision, and Quantization Errors Overview of Real-Time Processing Introduction to the IIR Filter-Based Graphic Equalizer Design of IIR Filter-Based Graphic Equalizer Using Blackfin Simulator Design of IIR Filter-Based Graphic Equalizer with BF533/BF537 EZ-KIT Implementation of IIR Filter-Based Graphic Equalizer with LabVIEW Embedded Module for Blackfin Processors More Exercise Problems

Parallel digital signal processing using multi-issue instructions

Abstract: This paper presents aspects of parallelism of computations in processing of signals using digital signal processors (DSPs) with multi-issue assembler instructions We present general features of the contemporary DSPs with special attention paid to the VLIW architecture In order to illustrate the multi-issue instruction technique we analyze performance of the fixed-point Blackfin processor by means of chosen typical signal processing tasks realized using VisualDSP++ 45 environment with Software Development Kit 201 Aspects of the floating-point processing are analyzed using Sharc and TigerSharc processors

Exploring Tradeoffs in Accuracy, Energy and Latency of SIFT in Wireless Camera Networks

Abstract: Advances in DSP technology create important avenues of research for embedded vision. One such avenue is the investigation of tradeoffs amongst system parameters which affect the energy, accuracy, and latency of the overall system. This paper reports work on benchmarking the performance and cost of Scale Invariant Feature Transform (SIFT) for visual classification on a Blackfin DSP processor. Through measurements and modeling of the camera sensor node, we investigate system performance (classification accuracy, latency, energy consumption) in light of image resolution, arithmetic precision, location of processing (local vs. server-side), and processor speed. A case study on counting eggs during avian nesting season is used to experimentally determine the tradeoffs of different design parameters and discuss implications to other application domains.

Blackfin® Processor SCCB Software Interface for Configuring I2C® Slave Devices

Abstract: Copyright 2003-2007, Analog Devices, Inc. All rights reserved. Analog Devices assumes no responsibility for customer product design or the use or application of customers’ products or for any infringements of patents or rights of others which may result from Analog Devices assistance. All trademarks and logos are property of their respective holders. Information furnished by Analog Devices applications and development tools engineers is believed to be accurate and reliable, however no responsibility is assumed by Analog Devices regarding technical accuracy and topicality of the content provided in Analog Devices Engineer-to-Engineer Notes. Introduction

On the implementation of a transciever to demodulate 384 MP3 satellite channels and remodulate them as 384 FDM stereo FM channels for cable distribution

Abstract: We describe the implementation of a unique digital transceiver system. This system decodes up to 384 MP3 stereo audio signals received from a satellite downlink. It digitally remodulates the multiple sampled data signal sets as analog FDM signal composed of dbx [1] (noise reduction system) encoded FM stereo signals. The MP3 decoding is performed by 48 Analog Devices Blackfin Processors. The dbx encoding, system specific stereo FM modulation and re-sampling channelizer is performed in a single Xilinx Virtex-4 XC4VSX55 FPGA. The FPGA outputs a single sampled data stream of channelized FDM signal spanning approximately the 20-to-80 MHz frequency band. The emphasis of this paper is the tasks performed in the FPGA based modulator.

Battery powered high dynamic range vision system

Abstract: A low cost autonomous vision system for real-time applications in natural environments has been realized. It encompasses a 160 by 128 pixel 120 dB dynamic range vision sensor performing contrast magnitude and direction computation at the pixel level (Ruedi, 2003), a BF 533 BlackFin processor, memory and a low data rate RF link usable to communicate the high level information extracted from the scene to a network of such devices. Used to implement a road marking detection algorithm, it proved to perform reliably at 25 frames per second in highly changing conditions ranging from night to sun in the field of view

Hardware Design of a High Performance Multi-Channel High Speed Signal Acquisition and Processing System

Abstract: This paper describes the hardware design of a high speed acquisition system based on a single DSP of ADI Blackfin family. In order to realize multi-functions in a single board, CPLD and FPGA chips are integrated in this system. This study discusses several main problems during hardware design of this system, such as sampling of multi-channel analog signals, multi-channel digital signals and communication with host board by extended PCI bus, in addition talking about several points concerned with signal integrity issues. The main aim of this research is to demonstrate that as development of DSP and semiconductor techniques, a more complex electric system can be realized on a single DSP.

ECG Monitor with Heart Rate Variability and Temperature for Use in Anesthesiology: Hardware and Software Architecture

Abstract: This article describes electronic equipment being developed now to provide the anesthesiologist with additional information on the balance between sympathetic and vagal systems of the surgical patient, based on the electrocardiogram acquisition, temperatures and heart rate variability analysis. It is of extreme importance, during surgeries under general anesthesia, that the anesthesiologist has quantitative information aid him to evaluate the patient’s anesthetic plan, allowing preventive and corrective interventions. The equipment is composed by a processing central developed around an ADSPBF532 Blackfin processor and by a front-end based on MC56F8013 processor.

Energy-Aware Programming on Blackfin® Processors

Abstract: Copyright 2007, Analog Devices, Inc. All rights reserved. Analog Devices assumes no responsibility for customer product design or the use or application of customers’ products or for any infringements of patents or rights of others which may result from Analog Devices assistance. All trademarks and logos are property of their respective holders. Information furnished by Analog Devices applications and development tools engineers is believed to be accurate and reliable, however no responsibility is assumed by Analog Devices regarding technical accuracy and topicality of the content provided in Analog Devices Engineer-to-Engineer Notes. Introduction