Showing papers on "Charge pump published in 2023"

Design and prototyping of transformerless DC-DC converter with high voltage ratio for MVDC applications

Abstract: Power boost DC-DC voltage converters have become a key element for medium-voltage DC (MVDC) applications as a link between generation and distribution grids, it is possible to classify the DC-DC converters into four families, depending on their characteristics, as well, one of the actual principal needs is to reduce the number of passive and active components needed for voltage conversions. This article presents a novel transformerles DC-DC boost-resonant converter, which is destined for the interconnection of medium and high voltage DC smart grids. The proposed DC-DC converter is composed of two inductors, a capacitor, and five IGBTs interrupters, which are responsible for the interaction between resonant and boost converters, in the same way, the resonant converter is composed of one resonant inductor and one resonant capacitor while the boost converter is composed by one boost inductor. This paper also presents the operation principle of the proposed converter, as well as its control, modular connection, and simulation to probe the behavior of the converter and an experimental 100 W prototype with 9.5 gain.

Resonant Peak Suppression Approaches for Improving the Dynamic Performance of DCX-<i>LLC</i> Resonant Converter Based Two-Stage DC–DC Converter

Abstract: The LLC resonant converter operated with fixed switching frequency can realize the function of dc transformer (DCX) and achieve high efficiency. To regulate the output voltage, a preregulator or postregulator is required, and thus constituting the DCX-LLC resonant converter based two-stage dc-dc converters, including the preregulator+LLC and LLC+postregulator converters. In this paper, it is found that there are two resonant peaks in the voltage-loop gain of the preregulator+LLC converter, which limits the crossover frequency and degrades the dynamic performance. To suppress the resonant peak, the virtual resistor introduced into output rectifier scheme (VR-ORS) for damping the resonant peak and the notch filter with specific gain inserted into voltage loop scheme (NF-VLS) for eliminating the resonant peak, are proposed, respectively. The implementation of the two approaches is derived and the design considerations of the voltage-loop compensator are presented. Finally, a 6-kW preregulator+ LLC converter is fabricated and tested in the lab. The experimental results are provided to verify the effectiveness of the proposed resonant peak suppression approaches for improving the dynamic performance.

Ultra-Low-Power Low-Input-Voltage Charge Pump for Micro-Energy Harvesting Applications

Abstract: A subthreshold input voltage charge pump based on the well-known cross-coupled voltage doubler and using boosted gate voltages for the transfer switches is presented. A level shifter and some inverters, including a novel inverter architecture proposed in this work and referred to as negative low-state voltage inverter, are used to generate the clock signals for the switching transistors with the purpose of significantly improving their drive capability. A complete analysis of the proposed charge pump is provided to highlight the advantages of the implemented structure, revealing the power efficiency improvement when the input voltage is below the threshold voltage of the transistors. An extensive experimental characterization of silicon prototypes in 180 nm CMOS technology was carried out, showing that the proposed scheme is able to pump charge from an input voltage as low as 110 mV. The experimental peak efficiency remains above 70% for input voltages between 180 mV and 400 mV and input power levels from 45 nW to 25 $\mu \text{W}$ , which are appropriate for different miniaturized transducers implementable on chip.

Highly Reliable Push–Pull Resonant DC/DC Converter for Medium-Power Applications

Abstract: This article presents a highly reliable push–pull resonant dc/dc converter for medium-power applications. At medium power, conventional push–pull resonant dc/dc converter experiences a very high current spike at the secondary-side switches, and this spike can destroy the active power components. We eliminate this current spike by connecting clamp diodes to the resonant capacitors. Moreover, the proposed converter achieves fully zero-voltage-switching (ZVS) turn- off at the secondary-side switches when the load exceeds the threshold. Furthermore, the proposed converter is invulnerable to the short-circuit problem at the output. Experimental results are presented to show the effectiveness of the proposed dc/dc converter at the medium power against a conventional solution.

One-Dimensional Maximum Power Point Tracking Design of Switched-Capacitor Charge Pumps for Thermoelectric Energy Harvesting

Abstract: This paper proposes a one-dimensional (1D) maximum power point tracking (MPPT) design which only requires measurement of one parameter (the input voltage of a switched-capacitor charge pump) for calibrating a power converter including the charge pump and thermoelectric generator. The frequency of the clock to drive the charge pump is designed to minimize the circuit area of the entire charge pump circuit for generating a target output current at a specific output voltage. The ratio of the capacitance value of each boosting capacitor (C) to the size of the switching MOSFET can be determined to maximize the transferring current at the same time. When a thermoelectric generator (TEG) is given, its output impedance is determined. Its open-circuit voltage varies with the temperature difference between two plates of the TEG. MPPT maximizes the output power of the charge pump even when the temperature difference varies. It was indicated that the number of stages of charge pump (N) needs to increase when the temperature difference lowers, whereas C needs to decrease inversely proportional to N, meaning that the C–N product should be kept unchanged for MPPT. Demonstration of the circuit design was conducted in 65 nm CMOS, and the measured results validated the concept of the 1D MPPT.

A Damping Control for DC Distribution System Under Isolated Operation Mode

Abstract: There are risks of resonant instability exiting in the DC distribution system configured with battery energy storage devices because of capacitors and inductors in the network with fast speed-controlled DC-DC converters. The DC distribution system needs battery energy storage devices to provide DC voltage support when it operates in an isolated island mode because of no AC or DC sources at that moment. To explore the key factors affecting the resonant instability of DC network, a three-terminal DC network consisting of DC voltage control, constant current control, and constant power load is used for state space modeling. Research results show that the inductors for faults current limitation interacting with the capacitors under high constant power load is the main reason causing instability. The other reason is the large parameter of the current controller. To suppress the resonant instability of the DC distribution system, a damping control strategy by filtering DC voltage in advance to the current control loop is proposed, and the parameters are selected using the roots locus method. Simulations verify the correctness and effectiveness of the proposed method.

A Low Mismatch Current Steering Charge Pump for High-Speed PLL

Abstract: AbstractThis paper presents the design of a charge pump based on the current steering and positive feedback topology to support application in high-speed PLLs. The primary objective of the design is to counter current mismatch in charging and discharging currents as well as maintain fast operation with the help of positive feedback assisted current steering topology. This charge pump is designed in UMC 65nm CMOS technology and its functionality, characteristics and amount of current mismatch are verified across voltage and temperature variations.KeywordsCharge pumpCurrent steeringPhase-locked loopHigh speed

DC/DC buck Converter Prototype for Educational Nanosatellite Power Sub-System

Abstract: Nanosatellites, originally developed for educational purposes, are now being used for increasingly commercial applications. To meet the new challenges, nanosatellites equipment must be improved to provide better performance. This necessitates the use of DC-DC Buck converters of +3.3V, +5V and +12V to step down the high-level DC voltages to a low-level. Current trends in DC-DC buck converter development focus on low losses, high power density, and high efficiency. This paper proposes a +12V DC-DC Buck converter and conducts a comparative study between DC/DC Buck converters to select an appropriate one for our requirements. The results show a good efficiency of 88 %, with an output voltage of ll.93V and an output current of 2.1A.

High-Efficiency CMOS Charge Pump for Ultra-Low Power RF Energy Harvesting Applications

Abstract: <p>This paper explicates the design and implementation of a switch capacitor DC-DC converter system for Radio Frequency (RF) energy harvesting applications for an input voltage in the sub-150mV range, using 180-nm CMOS triple-well BCD technology. The proposed system incorporates a charge pump architecture that employs an improvised Dynamic Gate Biasing (DGB), Forward and Reverse Body Bias technique (FRBB), along with a time axis symmetrical clocking scheme implemented using an advanced bootstrapped CMOS driver to enhance the overall drive capability of the system at low input voltages. Post-layout extracted simulations demonstrate that the proposed system achieves higher overall efficiency, delivering a peak Power Conversion Efficiency (PCE) of 85.8% at 125mV input voltage, outperforming other state-of-the-art architectures in similar voltage ranges. Moreover, the proposed system exhibits reliable operation even at input voltages as low as 85mV, while maintaining good overall efficiency.</p>

Very-Low-Voltage Charge Pump Topologies for IoT Applications

Abstract: This paper presents and discusses two Dickson charge pumps that are capable of working with a supply voltage lower than the MOS threshold voltage and are particularly suited for energy-constrained applications. Specifically, the paper includes a theoretical analysis of a previous topology introduced by the authors, and then it discusses a novel topology which solves drawbacks of the previous one. The paper also includes a comparison with other conventional topologies, namely the latched and the four-phase charge pumps, that shows the inherent advantage of the proposed solutions also in the range of input values higher than the MOS threshold voltage. 2-, 4-, and 6-stage versions of the conventional and proposed CPs have been fabricated in a 65-nm standard CMOS technology having a MOS threshold voltage equal to about 440 mV. Experimental results confirm the analytical predictions since the proposed topologies work at input voltage equal to 300 mV with a current load equal to 20 $\mu$ A and also confirm the advantages of the two proposed solutions in terms of settling time, output current drivability and output power density for voltages slightly higher (450 mV) than the MOS threshold voltage.

Modeling and Design of Cold-Start Charge Pumps for Photovoltaic Energy Harvesters

Abstract: <p>This article presents modeling and design optimization of switched-capacitor charge pumps for use as cold-start circuits in photovoltaic energy harvesters. For a successful coldstart from photovoltaic energy, a certain output voltage and current must be generated by the charge pump while jointly minimizing the required input voltage and current from the energy harvesting source. We model the operation of the coldstart charge pump including its oscillator, derive expressions for required input voltage and current based on output requirements, and demonstrate a pareto-optimal design space that defines the tradeoff between the required input voltage and current to achieve cold-start. We then assess the impacts of process and temperature variation, and suggest a general design methodology for cold-start charge pump circuits. Finally, we validate models with measurements from a design fabricated in 55nm CMOS.</p>

A Temperature Compensated Voltage Controlled Relaxation Oscillator for Frequency Modulated DC-DC Charge Pump Regulation

Abstract: Relaxation oscillators with wide dynamic range are required for low power frequency modulated switch mode DCDC regulator designs. In this brief, a temperature compensation technique with variable threshold control for Voltage Controlled Relaxation Oscillator (VCRO) is presented. The voltage to current conversion circuit reduces the drift in the frequency gain across temperature by introducing a PMOS-NMOS current gain compensation scheme. The current gain circuit also allows absolute control on the minimum value of control voltage after which VCRO starts doing voltage to frequency conversion. This restricts the amplifier to go out of saturation which is inherently generating the control voltage for VCRO. Measurement results show that across temperature range of -40 oC to 150 oC, the oscillator achieves a temperature stability of 187 ppm/oC at 18MHz and 171 ppm/oC at 92.5MHz respectively. Implemented in 90nm process node, it occupies 57μm×32μm area while dissipating 2.61 nW/KHz from a 1.5V supply.

DC-DC Converters for DC Transmission Grids

Abstract: This chapter describes DC-DC converters which are expected to become important components in large DC transmission grids. Similarly as with AC transformers in AC transmission systems, DC-DC converters enable interconnection between two DC systems with different voltage levels. However, some DC-DC converter topologies will provide a range of other functions including breaking DC circuits, power flow control and galvanic isolation. While the description of the DC-DC systems includes many design details, the application of DC-DC converters is still a concept, and the detailed design of these systems needs further in depth studies. The information provided in the chapter focuses on the functional requirements of the DC-DC systems, which are described in significant detail in this chapter. There are two families of DC-DC converters: Non-isolated DC-DC and Isolated DC-DC. Non-Isolated DC-DC is the lowest-cost topology, with the costs and losses expected to be 1.1–1.3 pu relative to a similarly rated single MMC VSC converter. The design, modeling and control of Non-Isolated DC-DC systems are decribed. The responses during DC faults are also analysed in some depth and DC fault simulation results are presented using a typical 600 MW DC-DC test system. The isolated DC-DC will have an internal AC transformer which provides galvanic isolation between two DC systems, while costs and losses are expected to be around 2 pu compared with a similarly rated MMC VSC converter. The design, modeling and control of this DC-DC topology is described based on the application of CIGRE’s DC grid test system. DC fault responses are also analysed and illustrated using simulation responses with a typical 600 MW test system. The DC-DC converter applications for interconnecting high voltage with medium voltage DC systems are also described. This application requires higher voltage step ratio and some specific DC-DC converter topologies are found to be more suitable than others. Typical applications would include interconnection to existing medium voltage DC systems like those with renewable energy plants.

A Pseudo-LDO-Assist Charge-Control SIMO Buck DC-DC with 0.02 mV/mA Cross Regulation

Abstract: Cross-regulation (CR) suppression is a challenge in single-inductor-multiple-output (SIMO) DC-DC. The pseudo-LDO-assist technology is presented to decrease CR of charge-control SIMO Buck DC-DC in this paper. With the fast current compensation of the proposed pseudo-LDO, the CR of the last DC-output, which used to be the largest CR in traditional charge-control SIMO, could be suppressed to the same level as that of the other DC-outputs regulated by charge control. Experimental results show that the largest CR of the proposed SIMO Buck DC-DC is 0.02 mV/mA in 488 mA load transient, which shows a 42.86% improvement compared to the existing charge-control SIMO.

Analysis of Bidirectional Dual Input Single Output DC-DC Converter for EV Application

Abstract: This paper proposes the charging application of electric vehicle(EV) using Bidirectional dual input single output (BDISO) dc-dc converter. BDISO converter is used to convert direct current(DC) from one voltage level to another voltage level. A dual input mechanism where one dc input is taken from solar PV array while the other dc input is taken from utility grid where AC is converted to DC with the help of rectifier and are given to the BDISO DC-DC converter. The resultant DC from the BDISO is given to the battery and used for the purpose of charging the EV. The running of the converter along with the charging criteria is discussed in this paper through the simulation model in simulink.

A Nonisolated Bidirectional DC-DC Converter with Current Ripple Cancellation at a Selectable Duty Ratio

Abstract: A high gain bidirectional DC-DC converter is described in this paper. This converter consist of a buck-boost topology which has continuous input current followed by a high gain switched-capacitor based boost converter [11]. The modified converter has six switches with their body diodes. The operation of switches is in such a way that three switches requires gate pulse from each side of operation. The current ripple cancellation at low voltage side and low switches voltage stress are the main feature of this modified converter. Compared to other buck-boost converters, the converter's voltage gain is more in boosting mode. The simulation study is carried out and presented for validation of the modified converter effectiveness.

A 2.5 GHz, 0.6 V Body Driven Dynamic Comparator Exploiting Charge Pump Based Dynamic Biasing

Abstract: In this paper a novel 0.6 V dynamic biased, body driven Strong Arm latch is presented. The proposed topology exploits a charge pump based dynamic biasing configuration that boosts the effective supply headroom. In addition, the body terminals are used to drive the input pair while the gates are driven by the clock signal to allow for the removal of the tail transistor, resulting in larger peak currents and smaller parasitic capacitances. This reduces power consumption and delay. Moreover, the body driven approach enables rail-to-rail input common mode range (ICMR). As a result, the proposed topology is capable of high-speed operation (up to 2.5 GHz) despite the low supply voltage. At 2.5 GHz the comparator shows a competitive energy-delay product (EDP) of 2.98 fJ/GHz.

A Self-bias-flip with Charge Recycle Interface Circuit with No External Energy Reservoir for Piezoelectric Energy Harvesting Array

Abstract: This paper presents a piezoelectric energy harvesting (PEH) interface circuit using a new self-bias-flip with charge recycle (SBFR) technique without employing any additional energy reservoir. Traditional designs, including synchronous-switch harvesting on inductor (SSHI), synchronous-switch harvesting on capacitor (SSHC), synchronous electric charge extraction (SECE), etc., require additional capacitors or inductors to reverse the voltage on the PEH at the zero-crossing point. This design innovatively uses the inherent capacitors of the piezoelectric harvesters as the flipping capacitors. In order to improve the extract efficiency of the interface, the zero-crossing state is split into charge recycle stage and voltage-flip stage. For a piezoelectric array with $2^{n}$ PEHs, a configuration with (n-1) phases in the charge recycle stage is adopted to reduce the loss caused by direct charge neutralization. The charge redistribution loss is reduced by employing (2n+1) phases in the voltage-flip stage. The proposed principle has been implemented with discrete components and is verified by 3 different prototypes. The measurement results show that a flipping efficiency of 67% is achieved by utilizing SBFR with 4 PEHs. And the proposed interface can provide up to 5.2x improvement when compared with the full-bridge rectifier (FBR).

Comparative Analysis of Phase/Frequency Detector in a Complete PLL System

Abstract: In many integrated radio frequency (RF) transceivers, the phase-locked loop (PLL) serves as a frequency synthesizer. This work goes to test various different phase/frequency detector blocks with a standard charge pump and Voltage controlled oscillator design. These include the comparison of different phase-frequency detectors (PFD) based upon D-flipflops, latches (Latch PFD) & pass transistors (PTPFD) to the more complex Pre-charged PFD. The best results of the PFDs in the PLL system in order are Pre-charge PFD, PT-PFD, Latch PFD and D-flipflop PFD. A charge pump PLL (CPLL) with a frequency range of [80 MHz -800 MHz] is simulated using Cadence Virtuoso (Spectre) at 180nm technology (scl\_pdk) with 1.8 V supply voltage. The phase noise of the VCO is less than -50dBc/Hz at 10MHz and is closer to 110dBc/Hz at 1GHz.

Design of DC-DC Boost Converter Using PFM Switching Technique

Abstract: An efficient Power management block that utilizes Pulse Frequency Modulation for Thermal Energy harvested applications is presented. The following paper focuses on energy harvesting applications, specifically thermoelectric generation (TEG), which produces a voltage that acts as an input to DCDC boost converters. The small voltages generated by TEG are amplified by controlling the transistor (used in boost converter) using an efficient duty cycle through Pulse Frequency Modulation (PFM). PFM block includes a voltage divider, comparator, charge pump, filter, and VCO. These blocks control the transistors, there by enhancing the DC-DC boost converter’s overall efficiency. The Circuits were simulated using Cadence 180nm technology. An output voltage of approximately 900 mV was achieved with a relatively low input voltage of only 100 mV when the entire block was simulated.

Review and Performance Analysis of Inductorless Charge Pumps for Low-Power Applications

Abstract: Charge pumps have long been the DC-DC converters of choice, especially in low-power and space-constrained applications where a part of the circuit requires a voltage different from what the source can supply. Charge pumps are often lauded for their relatively simple design, low cost, and exceptionally high efficiencies. The simplistic design can be attributed to the fact that it only requires a few discrete components or even single-chip solutions are available nowadays. Capacitors and switching devices form the fundamental operational part of these circuits. Specific variants are known to reach efficiencies above 95 percent, making them an excellent choice for modern designs. Before diving deeper and analyzing particular designs, this topic will briefly overview some standard topologies and their operating principles.

Increasing DC system stability thanks to energy control in MMC based DC-DC converters

Abstract: DC voltage regulation of DC networks is essential to the operation of the system. Recently a new control method called virtual capacitor control has been proposed for the Modular Multilevel Converter (MMC) to increase the inertia of HVDC systems. In the development of future DC grids, DC-DC converters will be needed. Most of DC-DC converters proposed in the literature for HVDC are based on the MMC, thus some of the features of this converter can be extended for DC-DC converters. In this paper, the virtual capacitor control is proposed for the Front-to-Front MMC. The proposed control approach is validated in transient simulations, analysing the impact on the interconnection of two DC systems. The simulations results show that the variation of the voltage of a DC network after a power disturbance can be decreased with the proposed control and at the same time the DC-DC converter offers a decoupling to the second DC network which is not affected by the perturbation. Moreover, the results show how the virtual capacitor concept can be extended to MMCs that are not directly connected to the DC network where the service is provided.

Efficient Hybrid Dual Full-bridge DC-DC Converters for Pulsed Output Current Applications

Abstract: This paper presents a hybrid full-bridge DC-DC converter for a wide output voltage range in high efficiency, especially for pulsed output current applications. For the conventional phase-shift-full-bridge DC-DC converter, the hard switching and circulating current lower the efficiency in the wide output conversion ratio. To improve the efficiency of the DC-DC power supply for the pulsed output current, a hybrid DC-DC converter is proposed. On the primary side, two full bridges are integrated by sharing a bridge leg. The circuit on the secondary side is a hybrid rectifier stage. For the pulsed output current with a constant load resistor, a single full bridge works in the low output current. For the large output current, the hybrid two full bridges work together. The circulating current in the hybrid working mode is reduced by a blocking capacitor. The converter is controlled by the phase shift and duty cycle control. All the switches work in zero voltage switching. A prototype is built to verify the performance and control strategy of the converter.

An Automotive 12 V-to-1.2 V Integrated Switched-Capacitor DC–DC Converter for Improved Load Transient Response

Abstract: This letter presents a 12 V-to-1.2 V switched-capacitor dc–dc converter, which has a voltage conversion ratio of 1/10 with an input voltage of 12 V, for automotive applications. The power stage comprises an 8-phase ladder converter and a 16-phase 3-to-1 converter. All power switches are designed using 5-V isolated CMOS transistors. To improve the load transient response, the bias current for the charge pump of the 3-to-1 converter is adjusted via a dynamic amplifier. The charge pump for the ladder converter is assisted by the feedback loop of the 3-to-1 converter so that it responds fast to the light-to-heavy load transition. The proposed phase-shedding control reduces the overshoot when the load current increases. The proposed work is fabricated in a 180-nm BCD process. For a load step of 60 mA, the light-to-heavy and heavy-to-light responses are improved by 47.28% and 52.50%, respectively. The maximum end-to-end efficiency is measured as 57.80%.

Source Switched Charge-Pump PLLs for High-Dose Radiation Environments

Abstract: This article presents a radiation tolerant charge-pump phase-locked loop (PLL) with low static phase error variability suitable for high-performance clock systems in high-dose radiation environments. We investigate the use of source switching charge-pump architectures to minimize any voltage- or dose-dependent charge injection and address the limitations of enclosed layout transistors (ELTs) in the conventional drain switched charge-pump. The circuit has been processed in a 65-nm complementary metal–oxide–semiconductor (CMOS) technology and has been experimentally verified with X-rays up to a total ionizing dose of 180 Mrad.

A High Peak-efficiency Cross-coupled Charge Pump with Low Input Voltage for Energy Harvesting System

Abstract: A high-efficient, low-voltage cross-coupled charge pump is presented in this paper. To decrease the conduction loss, a cross-coupled charge pump is proposed based on two auxiliary dynamic inverters to increase the clock swing. Meanwhile, a clocking scheme is designed to eliminate the reversion power losses. Based on proposed scheme, a higher output voltage is achieved by a three-stage topology by cascading the single stage. The proposed architectures of both single and three-stage charge pump are implemented under a standard 180nm CMOS technology. The post-layout simulation exhibits a peak power efficiency of 86.89% and 78.6%, respectively. And Monte Carlo (MC) simulation results indicate the proposed scheme features strong robustness to process variation.