Showing papers on "Code word published in 1973"

Random coding theorem for broadcast channels with degraded components

Abstract: This paper generalizes Cover's results on broadcast channels with two binary symmetric channels (BSC) to the class of degraded channels with N components. A random code, and its associated decoding scheme, is shown to have expected probability of error going to zero for all components simultaneously as the codeword length goes to infinity, if the point representing the rates to the various receivers falls in the set of achievable rates described by this paper. A procedure to expurgate a good random broadcast code is given, leading to a bound on the maximum probability of error. Binary symmetric broadcast channels always fall in the class of degraded broadcast channels. The results of the paper are applied to this class of channels of potential practical importance.

Variable block length synchronization system

Abstract: Framing or block synchronization of digital information signals grouped in blocks of variable length is provided by preceding each block with a synchronization code word. Each synchronization code word is error correction encoded in accordance with a BCH code to indicate the number of information bits in the following block and, hence, the location of the next succeeding synchronization code word. Since only the synchronization code words are error correction encoded, they can be distinguished from the information bits to obtain synchronization. A synchronization receiver acquires synchronization upon the occurrence of an error-free synchronization code word in the incoming signal. Synchronization is maintained thereafter by utilizing the inherent error correction capability offered by the BCH code to correct up to two errors in each received synchronization code word before decoding it to locate the next synchronization word. If, however, three errors are detected in a received synchronization word, synchronization is assumed to be lost and synchronization is thereafter recovered with the occurrence of a succeeding error-free synchronization code word in the incoming digital signal. Two receiver embodiments are disclosed which perform the above-described operation. The first embodiment is adapted to perform a general type of framing synchronization, while the other embodiment is specifically adapted to provide video synchronization.

Modular distributed error detection and correction apparatus and method

Abstract: Errors in code words fetched from memory or utilized in some other device are detected by apparatus distributed throughout the memory and then corrected. Illustratively, a 72-bit parallel code word, comprising a 64-bit information portion and an 8-bit check portion is fetched from the memory. The check bit generator consists of 8 identical modular units which, in the case of use in a memory, can be located at different locations within the memory. The identical modular units are connected in accordance with connections determined by an H matrix. The H matrix is partitioned into eight equal sections associated with eight information bits forming a byte and a single check bit. The rows of each partition or section are cyclically permutated from section to section. For example, the first row of the first section becomes the second row of the second section, etc. Each partition of the H matrix contains the same number of 1''s and each row within a partition is part of a different code group. Each of the identical modular arrangements contains a logic circuit grouping. The input information byte bits are connected to the circuits of the logic grouping so as to produce as circuit outputs the parities of the part of the code groups in the partition or section associated with the module. The identical modular units also contain circuitry to receive the partial code groups parities from the other modular units concerned with the same code group. These partial code group parities and the partial code group parity of the respective module are combined to provide the check bit for the particular module. The partial code group parity outputs from the module are transmitted to the successive other modules to form the partial code group parity inputs for the respective modules. After the information has been utilized such as writing in storage, the information bits and check bits are read into an error detector which compares the check bits generated from the received information bits with the received check bits. An error locator analyzes any mismatch to determine the location of an error. An error corrector then corrects any information or check bit which is identified as incorrect by the error locator. The error detector can consist of the same identical modular units as the check bit generator.

Sewing machine stitch pattern selection from data stored in a multiple pattern static memory

Abstract: A system is disclosed in which a plurality of sewing machine stitch patterns are stored in a static memory. Digital information related to the positional coordinates for each stitch of a plurality of stitch patterns is stored in a static memory. Each stitch pattern is automatically obtained upon activation of an operator actuated pattern selector switch which generates a digital code representative of the pattern selected. The pattern code word is latched and coupled to an address memory which provides a continuous fixed output of a digital code representative of the first word (stitch) in the selected pattern. The address memory is coupled to a counter which counts the pulses provided by a pulse generator which is driven in timed relation with the sewing machine drive shaft. The signal pulses are counted up in the counter to provide a timed series of progressively increasing binary numbers corresponding to the progressively increasing number of stitches in the pattern. The counter output is coupled to and functions as the address to the pattern memory which provides a digital output therefrom with information related to the positional coordinates for each stitch of a selected pattern. The output of the memory is coupled to an actuating means operatively connected to impart a controlled range of movement to the conventional stitch forming instrumentality of the sewing machine to produce a specific predetermined position coordinate for the needle penetration during each stitch formation. A unique code word is provided from the pattern memory output upon the completion of a selected pattern. This end of pattern code word is coupled to the address counter and resets it to the address originally coupled thereto thus, providing a continuously repeating stitch pattern.

A strongly regular graph derived from the perfect ternary Golay code

Abstract: This chapter explains the perfect ternary 2-error-correcting code This code was discovered by Golay The code is connected to the theory of confounding and fractional replication In terms of coding theory, the vectors are called the words, the number of nonzero coordinates of a word its weight, the subspace generated by G* a code, the vectors of a code its codewords, G* a generator matrix, and a matrix H* generating the orthogonal complement of the code a parity check matrix of the code The fact that every 11-dimensional vector over GF(3) differs from a unique codeword makes two coordinates code a perfect code The perfect ternary Golay code partitions the vector space V(11, 3) into 3 5 cosets obtained by adding a fixed word to all codewords Each word of weight < 2 should be in a coset containing no other word of weight < 2, because the minimum nonzero weight of the code equals 5 Therefore, the 243 cosets of the code are uniquely represented by the 220 words of weight 2, the 22 words of weight 1, and the word of weight 0 The cosets form a linear space of dimension 5 over GF(3)

Apparatus for data compression encoding and decoding

Abstract: A method and apparatus for decoding ordinary run length codes and run length codes that have been extended to include two classes of code words, ''''regular'''' code words for runs and ''''special'''' code words for selected special situations. The decoder comprises table storage and select/combine circuitry. The table storage holds four small tables whose values can be adjusted to correspond to any ordinary or extended run length code to be implemented. The select/combine circuitry receives successive code word bits, uses successive elements of one table to isolate the bits comprising a code word, and then combines the code word with other table values in order to calculate a binary value uniquely identifying the code word.

Tasi assignment control arrangement

Abstract: A TASI communication system includes P input PCM speech channels to a transmitter and P output PCM speech channels from a receiver and T PCM channels for T of the P channels to be propagated between the transmitter and the receiver, where P is an integer greater than one and T is an integer greater than one but less than P. P PCM speech words corresponding to the P input and output channels are arranged to form a first TDM frame format and T speech words corresponding to the T channels and one-half of a control word are organized to form a second TDM frame format with 2(T + 1) frames of the second format being organized to form a multiframe. The first (2(T + 1) -2) frames of the second frame format in the multiframe includes a different one of transmitted assignment code words for each of the first T of the control words. An assignment control arrangement is provided at both the transmitter and the receiver. The transmitter assignment control arrangement includes a storage means to store in sequence code words identifying the previous assignment for each of the P channels. Logic circuitry is provided responsive to a first transmit timing signal identifying each of the P speech words in sequence in the first format, a second transmit timing signal identifying each of the T speech words in sequence in the second format, a third transmit timing signal identifying each of the T control words in sequence during each search cycle, a fourth transmit timing signal identifying each of the T control words in sequence during each update cycle at the transmitter and the code words at the output of the storage means to determine the connection and activity status of each of the P channels and to produce code words identifying the assignment of previously connected ones or active ones of the P channels to particular ones of the T channels that are still connected and active and to identify new assignments to enable newly active ones of the P channels to be connected to available ones of the T channels and second logic circuitry responsive to at least the code words at the output of the storage means, the first and fourth transmit timing signals to return the code words to the storage means identifying previously established assignments (previous connections) that are to remain as before and to update the code words stored in the storage means for any new assignments. The receiver assignment control arrangement also includes a storage means to store in sequence code words identifying the previous assignment for each of the P channels as received from the transmitter and third logic circuitry responsive to transmitted code words, a first receive timing signal identifying each of the P speech words in sequence in the first format, a second receive timing signal identifying each of the T speech words in sequence in the second format, a third timing signal identifying each of the T control words in sequence during each update cycle at the receiver and the code words at the output of the receiver storage means to return the code words to the receiver storage means identifying previously established connections that are to remain and to update the code words stored in the receiver storage means for the new assignments.

Delta modulation communication system

Abstract: The disclosed delta modulation communication system digitally describes small differences between successive samples of an analog signal; when a large difference occurs, the actual value of the sample, not its difference from the preceding sample, is digitally described. The system also automatically reframes incorrectly grouped code word symbols at the receiver.

Method of establishing synchronism between teletypewriter transmitter and teletypewriter receiver

Abstract: A method is described for establishing character frame synchronism between a teletypewriter transmitter and receiver wherein the direction of transmission is unidirectional. The transmitter sends character signals identifying characters of the alphabet or the like and operating condition signals corresponding to the operation condition of the transmitter. The operating condition signals are processed in a code converter which allocates code words to them permitting recognition of the character frame. The code words are transmitted to the receiver wherein a clock signal is derived by means of a character frame discriminator. The code words are reconverted in the receiver in order to cancel the code conversion which took place at the transmitter.

Digital, adaptive T.V. transmission system - has different quantisation characteristics selected in accordance with video signal level control

Abstract: Quantisation characteristics are selected by permutation of code words in a code word combination transmitted by coded synchronisation pulses which precede the respective analogue picture signal; selection signal is derived from the knowledge of the source of the picture signal (camera, transparency or colour beam pickup); or it is derived from the analogue picture signal amplitude variation; it is transmitted in a code word combination preceding each frame or half-frame, or in a line synchronisation pulse code word preceding each line. The invention transmits the necessary signals for the selection of the transitory optimal quantisation characteristics without adding extra electrical capacitance from the channel and free from interference.

Method of code conversion of messages

Abstract: A method of code conversion of messages from a first code having a fixed number of multivalent elements, in particular an n-element binary code, to a second code. The elements of each code word of the first code are projected onto the first n and onto the last n element positions of a code word comprising m positions of the second code, where m is one of the numbers 2n-1 and 2n. The first projection leaves the sequence of the n elements unchanged; the second projection reverses the sequence of the n elements.

CHAPTER 3 – A Strongly Regular Graph Derived from the Perfect Ternary Golay Code

Abstract: Publisher Summary This chapter explains the perfect ternary 2-error-correcting code. This code was discovered by Golay. The code is connected to the theory of confounding and fractional replication. In terms of coding theory, the vectors are called the words, the number of nonzero coordinates of a word its weight, the subspace generated by G* a code, the vectors of a code its codewords, G* a generator matrix, and a matrix H* generating the orthogonal complement of the code a parity check matrix of the code. The fact that every 11-dimensional vector over GF(3) differs from a unique codeword makes two coordinates code a perfect code. The perfect ternary Golay code partitions the vector space V(11, 3) into 35 cosets obtained by adding a fixed word to all codewords. Each word of weight < 2 should be in a coset containing no other word of weight < 2, because the minimum nonzero weight of the code equals 5. Therefore, the 243 cosets of the code are uniquely represented by the 220 words of weight 2, the 22 words of weight 1, and the word of weight 0. The cosets form a linear space of dimension 5 over GF(3).

Code module for subscriber terminals

Abstract: To monitor the number of outside calls made by each subscriber terminal of a PBX telephone system, each subscriber terminal must be uniquely identified. In accordance with present day practices, PBX systems which have monitoring facilities either perform the monitoring function on the terminal side of the PBX, in which case a large number of monitoring devices are required, or they supply a unique frequency at each subscriber terminal and monitor on the outside trunk line side of the PBX. The use of a separate monitoring function or a separate frequency generator at each subscriber terminal makes the system expensive. The instant invention overcomes these disadvantages by providing a single code module with a plurality of outputs equal at least to the number of subscriber terminals. With these means for identifying the terminals, detectors are required only on the trunk side of the PBX. A code word generator in the module generates a unique code word at each of the module outputs, and each output is applied to a different subscriber terminal. Preferably, the code word generator is a maximal length pseudo-random code generator whose output is serially connected to a long shift register. The outputs of the stages of the long shift register correspond to the outputs of the code word module, and these are connected, in parallel, to the subscriber terminals. A unique code word is generated at each output.

Random Coding Theorem for Broadcast Channels With Degraded Components

Abstract: Absfroct-This paper generalizes Cover’s results on broadcast channels with two binary symmetric channels (BSC) to the class of degraded channels with N components. A random code, and its associated decoding scheme, is shown to have expected probability of error going to zero for all components simultaneously as the codeword length goes to infinity, if the point representing the rates to the various receivers falls in the set of achievable rates described by this paper. A procedure to expurgate a good random broadcast code is given, leading to a bound on the maximum probability of error. Binary symmetric broadcast channels always fall in the class of degraded broadcast channels. The results of the paper are applied to this class of channels of potential practical importance.

Reflected Binary Counters

Abstract: The progressive codes are a special class of the binary codes. In these codes successive code words differ in 1 bit only. This is a useful feature, for example in mechanical analog-to-digital converters where the position of a shaft has to be translated into a digital word. When using code discs with the natural binary code for this purpose, ambiguities in the sensing of the code strips on the disc (mechanical or photographic) by means of a reading device are practically unavoidable. These ambiguities depend on the precision of the code marks on the disc and that of the mutual positions of the sensors. For example, when in the transition from 7 to 8 (0111 to 1000) the 1, 2 and 4 sensors can test 0 signals and that the 8 sensor can only test a 1 signal after that, the 0 state will be indicated as an intermediate state between 7 and 8. Possibly combinations of states 1, 2 and 4 will also occur during this transition.