Showing papers on "Digital signal published in 2015"

Detection of geomagnetically-induced currents with power line-mounted devices

Abstract: A device for use in a power transmission system to sense GICs. The device may be a part of a reactance-injecting device on a power line, it may be a standalone device, or it may be a part of another type of device. The device may include a sensor to sense magnetic fields (e.g., a Hall effect sensor). The sensor may be positioned in the air gap of a magnetic core formed concentrically around the power line. The signal from the sensor may be converted to a digital signal and separately processed to determine the magnitude of the AC current and the magnitude of the DC (or quasi-DC) current. If the output signal of another A/C current sensor is available, that output signal may be used to adjust/calibrate the determined magnitude of the DC current. The sensor may communicate with other devices in a network to provide GIC information.

Heart monitors and processes with accelerometer motion artifact cancellation, and other electronic systems

Abstract: A heart monitor includes a single chest accelerometer (210), an analog signal conditioning and sampling section (215) responsive to said accelerometer to produce a digital signal substantially representing acceleration, and a digital processor (220) operable to filter the acceleration signal into a signal affected by body motion and to cancel the body motion signal from the acceleration signal, thereby to produce an acceleration-based cardiac-related signal Other processes and electronic systems are also disclosed

An Intelligent Digital Microfluidic Processor for Biomedical Detection

Abstract: An intelligent digital microfluidic processor for biomedical detection is presented. This potential architecture solves lots of traditional development bottlenecks to implement the easy-to-control, easy-to-monitor, system automation and high accuracy for bioassay detection purposes. The proposed processor integrates the functions of microfluidic actuation, droplet location readback and high sensitivity measurement window to demonstrate a novel prototype for personalized medicine. Furthermore, the droplet location map and reaction behaviors are visible on a 2-dimentional (2D) graphical user-interface due to the micro electrode dot array (MEDA) architecture and capacitive sensing technology, and hence system automation is achievable. Fabricated in standard 0.35 μm CMOS process, this work integrates 900 microelectrodes with measurement window in 3.2 mm2, where the high sensitivity capacitive readout circuit occupies only 0.048 mm2. Measurement results show that microdroplet actuation and 2D location map are activated under 1KHz. In addition, the function of digital signal extraction, processing, as well as statistical analysis can be operated under 1 MHz respectively.

Method and system for down-converting an electromagnetic signal, transforms for same, and aperture relationships

Abstract: Methods, systems, and apparatuses, and combinations and sub-combinations thereof, for down-converting an electromagnetic (EM) signal are described herein. Briefly stated, in embodiments the invention operates by receiving an EM signal and recursively operating on approximate half cycles (½, 1½, 2½, etc.) of the carrier signal. The recursive operations can be performed at a sub-harmonic rate of the carrier signal. The invention accumulates the results of the recursive operations and uses the accumulated results to form a down-converted signal. In an embodiment, the EM signal is down-converted to an intermediate frequency (IF) signal. In another embodiment, the EM signal is down-converted to a baseband information signal. In another embodiment, the EM signal is a frequency modulated (FM) signal, which is down-converted to a non-FM signal, such as a phase modulated (PM) signal or an amplitude modulated (AM) signal.

An All-Digital Scalable and Reconfigurable Wide-Input Range Stochastic ADC Using Only Standard Cells

Abstract: An all-digital programmable and reconfigurable stochastic analog-to-digital converter (ADC) is presented in this work. This ADC directly benefits from scaling by using only digital gates and relying on an increased mismatch between minimum‐sized transistors. The programmability and reconfigurability are achieved by dividing the design into eight channels. The mean of each channel is set independently using a digitally generated analog reference voltage with a 10-bit control word. The output of each channel is linearized using Gaussian linear interpolation. The entire ADC is written in Verilog and synthesized into digital standard cells using regular digital design tools. Fabricated in a 130-nm complementary metal–oxide–semiconductor process, the ADC covers signal-to-noise and distortion ratio from 28 to 34.9 dB with a programmable differential input range of 400–800 mVpp at 140 MS/s and 0.7-V supply.

Digital filter multiple access PONs with DSP-enabled software reconfigurability

Abstract: Digital filter multiple access (DFMA) passive optical networks (PONs) are, for the first time to our knowledge, proposed and extensively investigated, where digital signal processing (DSP)-enabled, software-reconfigurable, digital orthogonal filtering is employed in each individual optical network unit (ONU) and the optical line terminal to enable all ONUs to dynamically share the transmission medium under the control of the centralized software-defined controller and the transceiver-embedded DSP controllers. The DFMA PONs fully support software-defined networking with the network control further extended to the physical layer. As digital filtering is the fundamental process at the heart of the proposed DFMA PONs, the filtering-induced tradeoffs among upstream transmission capacity, filter design flexibility, and filter DSP complexity are examined, based on which optimum filter design guidelines are identified for various application scenarios. Furthermore, the performance characteristics of the DFMA PONs are also numerically explored in terms of maximum achievable upstream transmission capacity, differential ONU launch power dynamic range, and ONU count-dependent minimum received optical power.

Single channel 112Gbit/sec PAM4 at 56Gbaud with digital signal processing for data centers applications

Abstract: 112Gbit/sec DSP-based single channel PAM4 at 56Gbaud that fits into QSFP is experimentally demonstrated. The DSP enables use of mature 25G optoelectronics for 2–10km datacenter intra-connections, and 8Tbit/sec over 80km interconnections between data centers.

Signal and Systems

Abstract: This chapter provides a mathematical foundation for the analysis of signals, noise, and linear signal systems. The delta function plays an important role to develop theories of the Fourier analysis and to analyze signal and systems. The chapter discusses the energy, power, and their spectral densities of signal, and describes the correlation function and orthogonal signal. In radio communications, most of the noise is added to the signal in the radio channel and at the receiver. The noise that occurs at the transmitter hardly deteriorates the signal transmission quality, because the signal level is sufficiently high. Signal processing circuits are described with an emphasis on continuous time linear systems. The discrete‐time signal is considered to be a special case of analog signal in a sense that it is produced from the analog signal through sampling. The chapter also discusses the optimum solution for signal system and adaptive signal processing techniques.

Experiences With a Two-Terminal-Pair Digital Impedance Bridge

Abstract: This paper describes the realization of a two-terminal-pair digital impedance bridge and the test measurements performed with it. The bridge, with a very simple architecture, is based on a commercial two-channel digital signal synthesizer and a synchronous detector. The bridge can perform comparisons between the impedances having arbitrary phase and magnitude ratio. The bridge balance is achieved automatically in less than 1 min. $R$ – $C$ comparisons with calibrated standards, at kilohertz frequencies and 100- $\text{k}\Omega $ magnitude level, give ratio errors of the order of $10^{-6}$ , with potential for further improvements.

Digital Signal Transmission in Magnetic Induction Based Wireless Underground Sensor Networks

Abstract: The objective of Wireless Underground Sensor Networks (WUSNs) is to establish an efficient wireless communication in the underground medium. A magnetic induction (MI)-based signal transmission scheme has been proposed to overcome the very harsh propagation conditions in WUSNs. Due to a much lower vulnerability to the environmental changes, the MI technique has been shown to improve the system performance in terms of achievable data rates and coverage compared to the traditional EM wave based transmission. Two different approaches are known from the literature: direct MI transmission and MI waveguides, where many resonant relay circuits are deployed in the latter between the two nodes to be connected. In this work, digital transmission schemes are investigated for MI-WUSNs employing these two approaches. The influence of transmission parameters like symbol duration and modulation scheme are studied and new methods for their optimization are proposed. In this context, significant gains can be achieved compared to the naive straightforward approaches.

A Memristor-Based Continuous-Time Digital FIR Filter for Biomedical Signal Processing

Abstract: This paper proposes a new timing storage circuit based on memristors. Its ability to store and reproduce timing information in an analog manner without performing quantization can be useful for a wide range of applications. For continuous-time (CT) digital filters, the power and area costly analog delay blocks, which are usually implemented as inverter chains or their variants, can be replaced by the proposed timing storage circuits to delay CT digital signals in a more efficient way, especially for low-frequency biomedical applications that require very long tap delays. In addition, the same timing storage circuits also enable the storage of CT digital signals, extending the benefits of CT digital signal processing (DSP) to applications that require signal storage. As an example, a 15-tap CT finite impulse response (FIR) Savitzky-Golay (S-G) filter was designed with memristor-based delay blocks to smoothen electrocardiographic (ECG) signals accompanied with high-frequency noise. The simulated power consumption under a 3.3-volt supply was 6.63 $\mu{\rm w}$ .

Methods and systems for down-converting a signal using a complementary transistor structure

Abstract: Methods, systems, and apparatuses for down-converting a modulate carrier signal to a demodulated baseband signal by sampling the energy of the carrier signal are described herein. Briefly stated, such methods systems, and apparatuses operate by receiving a modulated carrier signal and using pulses with apertures to control a switch so as to (a) transfer energy from the modulated carrier signal and accumulate the transferred energy in a capacitor when the switch is closed during the apertures of the pulses and (b) discharge some of the previously accumulated energy from the capacitor into load circuitry at least when the switch is open. The demodulated baseband signal is generated from (i) accumulating energy transferred to the capacitor each time the switch is closed during the apertures of the pulses, and (ii) discharging some of the previously accumulated energy into the load circuitry each time the switch is opened.

A Case Study in Low-Complexity ECG Signal Encoding: How Compressing is Compressed Sensing?

Abstract: When transmission or storage costs are an issue, lossy data compression enters the processing chain of resource-constrained sensor nodes. However, their limited computational power imposes the use of encoding strategies based on a small number of digital computations. In this case study, we propose the use of an embodiment of compressed sensing as a lossy digital signal compression, whose encoding stage only requires a number of fixed-point accumulations that is linear in the dimension of the encoded signal. We support this design with some evidence that for the task of compressing ECG signals, the simplicity of this scheme is well-balanced by its achieved code rates when its performances are compared against those of conventional signal compression techniques.

Two-terminal store-and-control circuit

Abstract: A two-terminal store-and-control circuit includes a power circuit for receiving a modulated first signal, for receiving a second signal, for providing a power signal, and for providing a V− signal. A voltage comparator receives the modulated first signal and the V+ signal and provides a data signal that is extracted from the modulated first signal and the power signal. A data storage circuit receives and stores the data signal and provides a stored data signal. The circuit can be provided in a two-terminal store-and-control surface-mount device and employed to make a display.

Systems and methods for reduction of audio artifacts in an audio system with dynamic range enhancement

Abstract: In accordance with embodiments of the present disclosure, a control circuit may be configured to, responsive to an indication to switch between gain modes of a signal path having an analog path portion and a digital signal path portion, switch a selectable analog gain of the analog path portion between a first analog gain and a second analog gain, switch a selectable digital gain of the digital signal path portion between a first digital gain and a second digital gain, wherein the product of the first analog gain and the first digital gain is approximately equal to the product of the second analog gain and the second digital gain, and control an analog response of the signal path to reduce the occurrence of audio artifacts present in the output signal as a result of the switch between gain modes of the signal path.

Molecular Sensing and Computing Systems

Abstract: Advances in the field of synthetic biology have been key to demonstration of molecular computing systems in general and DNA in particular. This paper presents an overview of how continuous-time, discrete-time, and digital signal processing systems can be implemented using molecular reactions and DNA. In this paper, discrete-time systems refer to sampled signals with continuous signal amplitude. Signals that are sampled in discrete time steps with digital amplitude are referred to as digital signals. Delay elements in sampled signals are implemented using molecular reactions in the form of molecular transfer reactions. Completion of all phases of transfer reactions once corresponds to a computation cycle. These molecular systems can be implemented in a fully-synchronous, globally-synchronous locally-asynchronous or fully-asynchronous manner. The paper also presents molecular sensing systems where molecular reactions are used to implement analog-to-digital converters (ADCs) and digital-to-analog converters (DACs). Molecular implementations of digital logic systems are presented. A complete example of the addition of two molecules using digital implementation is described where the concentrations of two molecules are converted to digital by two 3-bit ADCs, and the 4-bit output of the digital adder is converted to analog by a 4-bit DAC. This system is demonstrated using both molecular reactions and DNA. A brief comparison of molecular and electronic systems is also presented.

Multilevel intensity modulation and demodulation system and method

Abstract: A multilevel-intensity modulation and demodulation system includes: a digital-to-analog conversion unit to convert an output level value of a digital signal into an analog signal; a multilevel-intensity-modulated light transmission unit to transmit an optical signal multilevel-intensity modulated based on the analog signal; a multilevel-intensity-modulated light reception unit to receive the optical signal multilevel-intensity modulated, and convert the received optical signal into an analog reception electrical signal; an analog-to-digital conversion unit to convert the analog reception electrical signal into a reception level value; and a controller to convert a transmission multiple gradation level being one of a plurality of multiple gradation levels of multilevel-intensity modulation to which the digital signal is mapped, into the output level value so as to cause the reception level value to be in a desired reception state, and to receive a digital signal corresponding to a reception multiple-gradation-level determined from the reception level value.

Systems and methods for multi-rate digital self-interference cancellation

Abstract: A system for multi-rate digital self-interference cancellation including a signal component generation system coupled to a digital transmit signal of a communication system that generates a set of signal components from the digital transmit signal; a multi-rate adaptive filter that transforms the set of signal components into a digital self-interference cancellation signal, according to a transform configuration, to form an interference-reduced receive signal; and a transform adaptor that dynamically sets the transform configuration in response to changes in the interference-reduced receive signal.

A Secure Watermarking and Tampering Detection Technique on RGB Image Using 2 Level DWT

Abstract: Digital watermarking is a method of combining data into a digital signal. In digital watermarking we work on two images one is for watermark image, which is cover on the original image (secondary image) that gives security to the image. It acts as a digital mark, providing the image a good decision of ownership or authenticity. Digital watermarking method is very inspiring for image authentication or security for attacks. This paper presents digital watermarking for their classification, application, techniques, attacks and also tampering detection in digital watermarking. We proposed a new algorithm for digital watermarking and tampering detection technique, by combining these techniques, we can improve the security of image. We worked on RGB components such as red, green and blue for enhancing security and robustness. 2-DWT applied on RGB components for better results. In the tampering process, we used watermarked image as a reference image for detecting tampering. The experimental results gave good PSNR value which is reached up to 55%.

Dynamic gain switching digital to analog converter

Abstract: A digital to analog converter that may include a digital gain block; an analog gain block; a digital to analog conversion (DAC) block and a controller that is configured to: determine a digital gain factor, selected out of multiple digital gain factors, of the digital gain block and an analog gain factor, selected out of multiple analog gain factors of the analog gain block; wherein the DAC block is preceded by the digital gain block and is followed by the analog gain block; wherein the digital gain block is configured to multiply a digital input signal by the digital gain factor to provide an intermediate digital signal; wherein the DAC block is configured to convert the intermediate digital signal to a converted analog signal; and wherein the analog gain block is configured to multiply the converted analog signal by the analog gain factor to provide an output signal; wherein an increment of the analog gain factor results in a decrement of the digital gain factor.

Circuit, a time-to-digital converter, an integrated circuit, a transmitter, a receiver and a transceiver

Abstract: A circuit according to an example includes a controllable oscillator configured to generate an output signal based on a control signal, an input signal processing circuit configured to receive a reference signal and configured to generate a sequence of digital values indicative of a phase relation between the reference signal and the output signal or a signal derived from the output signal, and a digital data processing circuit configured to generate a sequence of processed values at a lower frequency than a frequency of the sequence of the digital values, each processed value being based on a plurality of the digital values of the sequence of digital values, wherein the control signal is based on the sequence of processed values.

Order Functions Selection in the Variable-, Fractional-Order PID Controller

Abstract: In the paper a variable-, fractional-order PID (VFOPID) controller microprocessor realization problems are discussed. In such controllers the variable-, fractional-orders backward differences and sums (VFOBD/S) are used to perform closed-loop system error discrete-time differentiation and integration. In practice all digitally differentiated and integrated signals are noised so there is a necessity of a digital signal pre-filtering. This additionally loads the DSP system. A solution of this problem is proposed. Also the possibilities of the VFOPID controller DSP realizations are presented and compared with the computer simulation results.

Digital operation and eye diagrams in spin-lasers

Abstract: Digital operation of lasers with injected spin-polarized carriers provides an improved operation over their conventional counterparts with spin-unpolarized carriers. Such spin-lasers can attain much higher bit rates, crucial for optical communication systems. The overall quality of a digital signal in these two types of lasers is compared using eye diagrams and quantified by improved Q-factors and bit-error-rates in spin-lasers. Surprisingly, an optimal performance of spin-lasers requires finite, not infinite, spin-relaxation times, giving a guidance for the design of future spin-lasers.

Voice wakeup detecting device with digital microphone and associated method

Abstract: A voice wakeup detecting device for an electronic product includes a digital microphone and an application processor. The digital microphone has a function of judging whether a digital voice signal contains a subword according to subword model parameters. If the digital microphone confirms that the digital voice signal contains the subword, the digital microphone generates a first interrupt signal and outputs the digital voice signal. The application processor is enabled in response to the first interrupt signal. The application processor judges whether the digital voice signal contains a keyword according to keyword model parameters. If the application processor confirms that the digital voice signal contains the keyword, the electronic product is waked up from a sleep state to a normal working state under control of the application processor.

Surgical instrument utilizing sensor adaptation

Abstract: A surgical instrument can comprise a handle, a movable input, and an analog sensor configured to detect the position of the movable input, wherein the analog sensor is configured to produce an analog signal comprising analog data;. The surgical instrument can further comprise a microcontroller comprising an input channel, wherein the analog sensor is in signal communication with the input channel, wherein the microcontroller is configured to compare the analog data to a reference value, and wherein the microcontroller is configured to produce a digital signal in response to the comparison.

Method and apparatus for fmcw radar processing

Abstract: The disclosure provides a radar apparatus. The radar apparatus includes a transmitter that transmits a first chirp. The first chirp is scattered by one or more obstacles to generate a first plurality of scattered signals. A plurality of receivers receives the first plurality of scattered signals. Each receiver of the plurality of receivers generates a digital signal in response to a scattered signal of the first plurality of scattered signals. A processor is coupled to the plurality of receivers and receives the digital signals from the plurality of receivers. The processor performs range FFT (fast fourier transform) and angle FFT on the digital signals received from the plurality of receivers to generate a first matrix of complex samples.

Calibration of digital-to-time converter

Abstract: A technique for calibrating a digital-to-time converter includes an apparatus including a digital-to-time converter configured to generate an output signal based on a digital code, an input signal, and a gain calibration signal. The output signal has edges linearly delayed from corresponding edges of the input signal based on the digital code. The digital code vacillates between an evaluation code and a calibration code. The apparatus includes a reference signal generator configured to provide a delayed version of the input signal. The delay of the reference signal generator is matched to a delay of the digital-to-time converter. The apparatus includes a calibration circuit configured to generate the gain calibration signal based on the output signal and the delayed version of the input signal. The calibration code may alternate between a first calibration delay code and a second calibration delay code.

Digital noise loading for optical receivers

Abstract: Managing performance of an optical communications network may be facilitated by digital noise loading techniques. The digital noise loading techniques may include measuring a quality of a communication signal received at a coherent optical receiver, applying digital noise to the communication signal at the coherent optical receiver, and detecting a change in the quality of the communication signal at the coherent optical receiver in response to the application of the digital noise. Based on the change in the quality of the communication signal, an operating characteristic and/or a performance margin of the coherent optical receiver may be determined, prompting or facilitating further actions such as adjusting one or more operating parameters of the optical communications network and/or triggering an alert.

Transmission of single-carrier Nyquist-shaped 1-Tb/s line-rate signal over 3,000 km

Abstract: We synthesize a single-carrier optical signal at a record 1-Tb/s line-rate, out of multiple spectral slices by joint optical and digital signal processing. The 127.9-GBd signal is successfully transmitted and detected after 3,000km distance.

Analog-to-digital converter and image sensor

Abstract: An analog-to-digital converter has a sampler to hold a sampled signal, an input signal predictor to generate a prediction signal at predetermined timing before a signal level of a ramp signal that monotonically increases or monotonically decreases with time crosses a signal level of the sampled signal, a comparator to compare signal levels of the ramp signal and the sampled signal to output a comparison signal showing whether the signal level of the ramp signal is larger than the signal lever of the sampled signal, a first counter to perform a count operation in synchronism with a first clock signal within a period from start of a comparison operation by the comparator to generation of the prediction signal, and a second counter to perform a count operation in synchronism with a second clock signal.