Showing papers on "Dynamic demand published in 1999"

A fully digital, energy-efficient, adaptive power-supply regulator

Abstract: A voltage scaling technique for energy-efficient operation requires an adaptive power-supply regulator to significantly reduce dynamic power consumption in synchronous digital circuits. A digitally controlled power converter that dynamically tracks circuit performance with a ring oscillator and regulates the supply voltage to the minimum required to operate at a desired frequency is presented. This paper investigates the issues involved in designing a fully digital power converter and describes a design fabricated in a MOSIS 0.8-/spl mu/m process. A variable-frequency digital controller design takes advantage of the power savings available through adaptive supply-voltage scaling and demonstrates converter efficiency greater than 90% over a dynamic range of regulated voltage levels.

Dynamic power consumption control for a computer or other electronic apparatus

Abstract: Disclosed is a method and apparatus for controlling power consumption of the PC, which is provided with base loads comprising a plurality of components, as well as a CPU including operation modes of “throttling” and “clock-down”. Actual power consumption 103 of the CPU in a certain operation mode varies heavily or widely within a range of maximum power consumption of the CPU. A variation of actual power consumption 101 of the base loads is relatively gentle or mild. Predicted maximum power consumption (Pmax) of the PC is obtained from actual power consumption of the base loads and maximum power consumption in the current operation mode of the CPU. Reference power vales 121, 123, 125 are set up such that they are compared with the Pmax for changing an operation mode to another operation mode. When the Pmax exceeds a reference power vale, the operation mode of the CPU is changed for controlling actual power consumption of the PC.

Dynamic power-conscious routing for MANETs: an initial approach

Abstract: We develop an initial dynamic power-conscious routing scheme (MPR) that incorporates physical layer and link layer statistics to conserve power, while compensating for the channel conditions and interference environment at the intended receiver. The aim of MPR is to route a packet on a path that will require the least amount of total power expended and for each node to transmit with just enough power to ensure reliable communication. We evaluate the performance of MPR and present our preliminary results.

Ripple correlation control, with some applications

Abstract: Ripple correlation control is a nonlinear control approach applicable to power electronic circuits. It makes use of voltage, current, or power ripple and correlates this with switching functions to effect control. The technique is especially well suited to power electronics because ripple is inherent, and can be treated as an internal perturbation. Ripple correlation control directly supports cost-function minimization and maximization. It can be applied, for example, to dynamic power optimization. It has been applied to adaptive dead time adjustment, solar power processing, and motor power minimization. Potential future applications include active maximization of converter efficiency and other nonlinear functions.

Power conditioning apparatus with energy conversion and storage

Abstract: A method and apparatus for power conditioning and for storing electrical energy, fossil fuel energy, or both in the form of a compressed gas which may then be used in combination with a fossil fuel to generate conditioned electrical power is disclosed. The present invention provides a method wherein the energy so stored is used as a back-up power source to assure uninterrupted conditioned electrical power in the event of a failure of a primary electrical power source. Turbine rotors are maintained in rotation to provide a spinning reserve in that the inertia of the turbines can be used to generate power in the event of minor power disruptions, and the turbines can be powered for producing power in the event of greater power disruptions. The present invention provides an apparatus that enhances the flexibility and efficiency of a power consumer and the internconnected power providing system by allowing the user to have an efficient spinning reserve of power, by providing the capability of a user to shape the load, thereby reducing the spinning reserve requirement of the interconnected system, and to sell excess power and to control transportation costs. Since the present invention allows a user to purchase power from the most efficient source, the present invention promotes efficiency throughout the power generation and power transportation industry.

Method for power routing and distribution in an integrated circuit with multiple interconnect layers

Abstract: An integrated circuit 210 has a power grid formed from a first set of power buses 201 a and 202 a on a metal interconnect level M 1 , a second set of power buses 203 a and 204 a on interconnect level M 4 , and a third set of power buses 205 a and 206 a on inter-connect level M 5 . The set of power buses on level M 4 are oriented in the same direction as the set of power buses on level M 1 , and both sets of buses are located coincidentally. A high power logic cell 220 is pre-defined with a set of M 1 -M 4 power vias 221 and 222 so that logic cell 220 can be positioned in a horizontal row unconstrained by pre-positioned M 1 -M 4 power vias. Dummy cell 230 with M 1 -M 4 power vias is positioned as needed so as not to exceed a maximum strapping distance D 1 . A maximum value for distance D 1 is selected based on dynamic power requirements of nearby logic cells 250 a-n as determined by simulation. A method for designing and fabricating integrated circuit 210 is described.

Power exchange for frequency control (PXFC)

Abstract: This paper concerns markets for balancing power supply and demand in real-time Two qualitatively different market mechanisms are of interest: (1) primary electricity market(s) for supplying anticipated demand, and (2) a frequency control market for ensuring that system frequency remains within prespecified limits as demand deviates in real-time from its anticipated pattern We suggest that both types of markets are necessary for ensuring that frequency remains within its technically acceptable limits as power is provided competitively In particular, we develop one possible structure of a power exchange for frequency control (PXFC) that ensures frequency quality in a general primary electricity market comprising both bilateral and spot sub-markets

Multiple-V/sub dd/ multiple-V/sub th/ CMOS (MVCMOS) for low power applications

Abstract: In this paper, multiple-V/sub dd/ and multiple-V/sub th/ design techniques are combined to simultaneously achieve high performance and low power. The transistors in critical path(s) are assigned a higher supply voltage and a lower threshold voltage for high performance, while the transistors in non-critical paths may have a lower supply voltage and/or a higher threshold voltage to suppress dynamic power and leakage power. Accurate delay and power estimates using table look-up methods based on HSPICE simulations are used for supply voltage and threshold voltage optimization. Several algorithms for V/sub dd/ and V/sub th/ assignments under performance constraints are proposed and a genetic algorithm based vector control technique is presented for standby leakage reduction. For the ISCAS benchmark circuits, multiple-V/sub dd/, multiple-V/sub th/ CMOS (MVCMOS) design technique can reduce dynamic and leakage power dissipations by around 20% and 70%, respectively.

Synthesis of low power CMOS VLSI circuits using dual supply voltages

Abstract: Dynamic power consumed in CMOS gates goes down quadratically with the supply voltage. By maintaining a high supply voltage for gates on the critical path and by using a low supply voltage for gates off the critical path it is possible to dramatically reduce power consumption in CMOS VLSI circuits without performance degradation. Interfacing gates operating under multiple supply voltages, however, requires the use of level converters, which makes the problem modeling difficult. In this paper we develop a formal model and develop an efficient heuristic for addressing the use of two supply voltages for low power CMOS VLSI circuits without performance degradation. Power consumption savings up to 25% over and above the best known existing heuristics are demonstrated for combinational circuits in the ISCAS85 benchmark suite.

Zone branch reliability methodology for analyzing industrial power systems

Abstract: There are many methods available for evaluating the frequency and duration of load point interruptions within a given industrial power system configuration. As systems become larger and more interconnected, these existing methods can become computationally bound and limited in their ability to assess the impact of unreliable protective equipment and unreliable protection-coordination schemes on individual load point reliability indexes within a given plant configuration. These methods also can often not account for complex isolation and restoration procedures within an industrial plant configuration. This paper presents a zone-branch methodology that overcomes many of these limitations and applies the methodology to a large industrial plant power system configuration. The primary advantage of the zone-branch methodology is that it can readily identify faulty protection schemes involving all the components of an industrial power system and evaluate load point reliability indexes.

Dynamic Power-Conscious Routing for MANETs: An Initial Approach.

Abstract: We develop an initial dynamic power-concious routing scheme (MPR) that incorporates physical layer and link layer statistics to conserve power, while compensating for the channel conditions and interference environment at the intended receiver. The aim of MPR is to route a packet on a path that will require the least amount of total power expended and for each node to transmit with just enough power to ensure reliable communication. We evaluate the performance of MPR and present our preliminary results.

Delay insensitive RSFQ circuits with zero static power dissipation

Abstract: Total power dissipation in RSFQ circuits consists of two parts, dynamic and static. Dynamic power is dissipated in Josephson junctions performing useful logical and data transmission operations. This dissipation is fundamental and proportional to the data rate (at 4 K, of the order of 10/sup -18/ Joule per bit). Static power is dissipated in resistors used by RSFQ circuits to distribute dc bias current between Josephson junctions. This part of dissipation is not intrinsic to RSFQ circuits and in principle can be eliminated. The goal of this work is to show that Delay Insensitive (DI) RSFQ primitives can be modified so that resistors are no longer required in the dc power supply distribution network, so that the on-chip static power dissipation is absent. In this report we present the schematics for such primitives, define the class of circuits that allow resistor-free current distribution network, and formulate the requirements to the design of this network.

Algorithmic and architectural techniques for low-power digital signal processing

Abstract: We present new approaches which can be used to reduce power consumption and/or increase speed of DSP algorithms. Two main ideas are presented; low power quantization, and, computational redundancy removal. The first approach reduces dynamic power consumption of DSP algorithms by trading-off accuracy. A general mathematical frame-work is developed which describes the nature of low-power quantizations and relates these to optimal solutions of constrained least-squares (CLS) problems in the context of FIR digital filter implementation. Arithmetic architectures which validate our dynamic power reduction approaches are also presented. In particular, we present low-switching array multipliers which are hybrids of LSB-first and MSB-first array-multipliers. A detailed switching activity analysis of variants of array multiplier and a 4:2 compressor based tree multiplier shows that various architectures are suitable for various applications based on the statistical properties of signals processed. In the second part, we address reducing computational redundancy by efficiently sharing computation. This approach reduces the complexity of DSP algorithms without compromising performance. We show that common DSP tasks can be expressed as multiplication of vectors by scalars and by using a graph theoretic approach, one can obtain a solution which efficiently shares computation to eliminate all multipliers from the algorithm. We demonstrate this point by obtaining very low-complexity multiplierless filters. New multiplication strategies are proposed which reduce redundant computation from such operations, thereby resulting in a low-power and/or high speed implementation. The idea of increased computation sharing by introducing further quantizations is also presented and explored for low-complexity design.

An on-line determination of the ready reserve power

Abstract: The paper presents usage of an artificial neural network (ANN) for the on-line determination of the ready reserve (RR) required for compensation of power deficit in power systems. The power deficit usually results after generator outage or failure of the other means of ensuring the operational reserve. RR consists of rapid start-up generating units such as gas turbines and hydro plants. Due to the stochastic nature of the power system operation, the amount of ready reserve is essential for balancing the power system operating states in perturbed conditions. For that purpose, an ANN using back-propagation learning rule could yield the amount of ready reserve. Prompt assessment of the appropriate amount of RR minimizes the potential reduction of quality of electrical energy delivered to customers and, consequently, maintains a high reliability of the power system as a whole.

Adaptive power margin for hard handoffs in code division multiple access based systems

Abstract: A technique for regulating the transmit power level for a mobile station following a hard handoff in a code division multiple access (CDMA) based system is disclosed. In an embodiment of the invention, a profile is developed from data associated with transmit power levels from a statistical collection of a plurality of hard handoff events. A power margin is derived from the profile such that it may be varied in accordance with high or low load conditions in the system. The power margin is then applied to mobiles performing hard handoffs such that they transmit only at the appropriate power level required for a sufficient connection in the cell. The technique provides an automated and dynamic power margin which is scalale according to the varying loading conditions in the system. The invention reduces the amount of interference generated by transmitting at unnecessarily high power levels following hard handoffs thereby improving the overall performance and connection quality of the system.

Stability of a pump storage hydro-power station connected to a power system

Abstract: The operational flexibility of pumped storage hydropower stations means that they are often used for the control of power system frequency. When used in this role, the response of the power station is determined by the behaviour of its governor, the stiffness of the connected grid and the interaction between the governor and the grid. An investigation into the governor settings at Dinorwig power station in the UK has been undertaken in order to establish the optimum governor settings for different loading conditions, providing as close to an ideal response as possible without endangering the stability of system frequency control. The gain and phase margins of the open loop transfer function of the system were examined to determine the stability of the power system, and the effect of the droop settings and the grid size are included in the study. Information on stability of the power station is presented for a variety of operating and grid conditions.

Implementation of a transient energy method for directional detection in numerical distance relays

Abstract: Changes in the operating conditions in today's dynamic power systems environment imposes greater demands on the protective relays for transmission and bulk lines. Heavy load currents, series compensated lines, reduced fault clearing time requirements and adaptation to rapidly changing system conditions are just some of the challenges that modern transmission line protective relays have to resolve. Conventional operating principles for directional detection, based on negative or zero sequence voltages or currents polarization in some cases do not satisfy the requirements for improved sensitivity and fast operation under varying system conditions. A method for directional detection based on the transient energy phenomena is presented in the paper. The method uses superimposed components derived from pre-fault and fault current and voltage samples. Three phase power is then calculated on a per sample basis and then integrated for several consecutive samples to determine the transient energy and its sign.

Keeping the lights on [power system reliability]

Abstract: Of all the energy conversion processes in existence, the US electric power system is the largest and most complex. Unlike industries such as communications and transportation, where a demand in excess of supply produces a "busy signal" or temporary grid lock, the nature of the electric power system is one of instantaneously matching supply and demand. Failure to sustain this balancing act can result in partial or complete breakdown of the grid system. In this paper, the authors describe how maintaining reliable electricity grids in a deregulated power industry will become harder, as temptations to cut corners multiply.

Optimal power flow formulation in market of retail wheeling

Abstract: Power system deregulation along with retail wheeling was proposed in legislation for the future power system operation. Retail wheeling implies customers have more choices. One important option is the power supplier providing cheaper power. In this paper, the authors introduce new concepts of generation sets and load sets to model the behavior of power supply and load distribution in the new retail wheeling market. Formation of the optimal power flow (OPF) problem, in which public interests are maximized, is demonstrated. The IEEE-14 bus system is used as an example.

Complete controllability of an N-bus dynamic power system model

Abstract: As the computational and analytical methods for voltage stability assessment become more mature, voltage control becomes a primary issue. Power systems are large, nonlinear, and dynamic. During the last three decades, the application of differential geometry in the area of nonlinear control has produced significant results for the controllability analysis. This paper is concerned with the controllability problem of power systems using the differential geometric methods. The modeled control devices include the mechanical power input to generators, VAr compensation devices, and tap settings of the on-load tap changers. Conceptually, the main result of this research is the characterization and construction of a complete controllability region, within which a power system can be steered from one state to another by use of piecewise constant controls. The results are obtained for two cases: (1) unbounded piecewise constant controls and (2) bounded piecewise constant controls. A complete controllability region identifies the limitations of the available controls of a power system. The proposed method is believed to be significant since it is a new and systematic approach to the analysis of power system controllability using a nonlinear control system model.

Dynamic power supply current test for CMOS SRAM

Abstract: This paper presents the relationship between the dynamic power supply current and the switching behavior of an SRAM cell. Compared to a fault free cell, how the short, open and coupling faults can affect the peak value of a dynamic current pulse when a transition write is performed, is analyzed. In addition, the test for linked idempotent coupling faults is proposed. This new approach has reduced test length compared to the previous March B test. Finally the low overhead built-in current sensor that can detect a dynamic current pulse and distinguish its peak value, is proposed.

Logistics Network Design Evaluation in a Dynamic Environment

Abstract: Most of the optimization models proposed in the literature for evaluating the layout of a logistics distribution network consider a static demand pattern, which then leads to a single-period problem. Hence, the adequacy of those models is limited to situations where the demand pattern exhibits no remarkable variations throughout the planning horizon. We propose a dynamic model including many relevant issues which play a role when evaluating a logistics distribution network. In addition to dealing with dynamic demand patterns, our model includes aspects related to the inventory policy (in contrast with the static models). Heuristic solution approaches are presented for particular cases of this model and insight is given for the general model.

Time-domain model for power dissipation of CMOS buffers driving lossy lines

Abstract: The dynamic power consumption of a CMOS buffer driving lossless and lossy transmission lines is investigated. A time-domain model for power dissipation in both the line driver and the interconnect losses is also presented. The model fully agrees with HSPICE simulations and is particularly suitable for implementation in CAD tools for fast estimation of VLSI dissipation circuits.

Frequency control in the Nordic Power System experiences and requirements

Abstract: The Nordic Power System in Norway, Sweden, Finland and Denmark consists of several interconnected power networks. Frequency control and emergency reserves are coordinated and several companies take part. Large frequency excursions occur very seldom, and experience from load shedding is very good.

Technology projections for solar dynamic power

Abstract: Solar Dynamic power systems can offer many potential benefits to Earth orbiting satellites including high solar-to-electric efficiency, long life without performance degradation, and high power capability. A recent integrated system test of a 2 kilowatt SD power system in a simulated space environment has successfully demonstrated technology readiness for space flight. Conceptual design studies of SD power systems have addressed several potential mission applications: a 10 kilowatt LEO satellite, a low power Space Based Radar, and a 30 kilowatt GEO communications satellite. The studies show that with moderate component development, SD systems can exhibit excellent mass and deployed area characteristics. Using the conceptual design studies as a basis, a SD technology roadmap was generated which identifies the component advances necessary to assure SD systems a competitive advantage for future NASA, DOD, and commercial missions.

Assessing the benefits of adjustable speed hydro machines

Abstract: Summary form only given This paper presents the adjustable speed hydro (ASH) machine concept as an alternative for obtaining better utilisation of power networks Transmission lines appearing as bottlenecks with respect to power demand may increase their transfer capacity as ASH machines are introduced in the network This is achieved by a quick and precise regulation of rotor currents and thereby active and reactive power out of the machine During faults in the network, these properties map be utilised to maintain near constant power production and torque equilibrium This in turn gives less speed deviation and better ability to control the network behaviour Hence, the ASH machine can give a considerable contribution to the network both during and after serious conditions in the power system

CubicWare: a hierarchical design system for deep submicron ASIC

Abstract: In this paper, we present CubicWare, a hierarchical design system which can estimate both timing and power consumption at the pre-layout stage. CubicWare consists of a floorplanner (CubicPlan), a delay calculator (CubicDelay), and a power estimator (CubicPower). CubicPlan provides accurate estimation of the interconnect parasitics, and CubicDelay calculates the delay including the effect of interconnects. Based on this delay, logic simulation is performed to verify the functionality and timing of the design. In the process, switching statistics on each gate is obtained. CubicPower reads the switching statistics and the power characteristics of gates to estimate the power consumption. The proposed parasitics estimation algorithm in CubicPlan can consider the coupling capacitances of the interconnects using the wiring congestion map. This approach provides a significantly improved correlation with the post-layout than the conventional statistical methods in terms of interconnect capacitances. CubicWare also supports the full functions of hierarchical manipulations including hierarchical delay calculation. The timing estimation of CubicWare at the pre-layout stage shows less than 10% error compared to the post-layout result. Experimental results of the dynamic power estimator at the gate level shows less than 10% error compared to the results of Powermill and the measured values of the IMS tester.

Dynamic power estimation using the probabilistic contribution measure (PCM)

Abstract: In this paper, we present CubicPower which is a dynamic power estimator based on Verilog/VHDL. We propose the power characterization model and the probablistic contribution measure (PCM) algorithm to calculate the actual power consumption of cell instances with given switching information. In addition to PCM, the state dependency and nonswitching activity of gates are taken into account for morte accurate power estimation, Experimental results of CubicPower show less than 10% error compared with the results of PowerMill simulation and the measured values of the IMS test equipment. Due to the PCM algorithm CubicPower is more accurate than the leading commercial dynamic power estimator at the gate level and is 2-3 orders of magnitude faster than PowerMill.

Market power under transmission congestion constraints

Abstract: The main concern about market power in an electricity market is the concentration of ownership that would permit the exercise of market manipulation The widespread potential for transmission congestion constraint is a crucial factor to improve the potential impacts of market power This paper discusses the horizontal power market for the special case of the electrical power system A methodology for the assessment of the impact of a given power transaction on the network capability is reported