Showing papers on "Equivalent series resistance published in 1989"

Oscillations up to 420 GHz in GaAs/AlAs resonant tunneling diodes

Abstract: We report room‐temperature oscillations up to frequencies of 420 GHz in a GaAs resonant tunneling diode containing two 1.1‐nm‐thick AlAs barriers. These results are consistent with a recently proposed equivalent circuit model for these diodes in which an inductance accounts for the temporal delay associated with the quasibound‐state lifetime. They are also in accordance with a generalized impedance model, described here, that includes the effect of the transit time delay across the depletion layer. Although the peak‐to‐valley ratio of the 420 GHz diode is only 1.5:1 at room temperature, we show that its speed is limited by the parasitic series resistance rather than by the low negative conductance. A threefold reduction in this resistance, along with a comparable increase in the peak‐to‐valley ratio, should allow oscillations up to about 1 THz.

Lossless broad-band monolithic microwave active inductors

Abstract: Lossless broadband microwave active inductors for general-purpose use in microwave circuits are proposed, and their characteristics are discussed. These active inductors are composed of a common-source cascode FET and a feedback FET, and operate in a wide frequency range with very low series resistance. Their low-loss characteristics are demonstrated by simulation and experimental results. A maximum Q factor of 65 is obtained. Theoretically, it can reach infinity. The inductance value can be controlled by an external voltage control. >

Operating principles of the ultracapacitor

Abstract: The charge-storage mechanism and the design of the ultracapacitor are described. Based on a ceramic with an extremely high specific surface area and a metallic substrate, the ultracapacitor provides extremely high energy densities and exhibits low ESR (equivalent series resistance). The combination of low ESR and extremely low inductance provides the ultracapacitor with a very high power density and fast risetime as well. As a double-layer capacitor, the ultracapacitor is not constrained by the same limitations as dielectric capacitors. Thus, although its discharge characteristics and equivalent circuit are similar to those of dielectric capacitors, the capacitance of the ultracapacitor increases with the ceramic loading on the substrate and its ESR is inversely proportional to the cross-sectional area of the device. The ultracapacitor is composed of an inline stack of electrodes, which leads to an extremely low inductance device, and it exhibits interesting frequency dependence. The ultracapacitor principle has been extended to nonaqueous electrolytes and to a wide temperature range. >

Equivalent Circuit Model in Grain‐Boundary Barrier Layer Capacitors

Abstract: Electrical properties of BaTiO3-based capacitors are investigated. A new model is developed to explain the frequency response of the impedance of grain-boundary barrier layer (GBBL) capacitors. This model takes into consideration the dipole polarization effect and provides a simple and effective approach to evaluate the performance of GBBL capacitors with various dopants and sintering in different atmospheres. When sintered in a reducing atmosphere, doped BaTiO3 exhibits a higher dielectric constant and a relatively stable dieletric constant with respect to the frequency response and temperature dependence. Also, smaller grain resistivity is obtained with addition of both Dy2O3 and Nb2O5.

A self consistent approach to IV-measurements on rectifying metal-semiconductor contacts☆

Abstract: An experimental procedure is presented for the determination of the barrier height of metal-semiconductor contacts that avoids the use of the so called “ideality factor” n, common in the fit of experimental IV-data. We choose the commonly experienced case where the deviation of n from 1 is caused by a combination of recombination current contribution and the influence of series resistance. These effects are introduced into a computer fitting to the experimental forward IV data. We report on very good fitting of theory and experiment. Also, the discrepancy in the φB values determined by ordinary deduction from IV measurements and those obtained from photoelectric measurements practically vanishes if our procedure is used.

The effect of neutron irradiation on silicon photodiodes

Abstract: Neutron radiation testing was performed on a total of 125 silicon photodiodes to investigate the changes in the device parameters after neutron exposure. A californium-252 source was used to irradiate the photodiodes with 1-MeV equivalent neutrons having fluences in the range of 5*10/sup 11/ to 10/sup 14/ n/cm/sup 2/. The photodiode forward voltage drop, ideality factor, and series resistance increased after neutron exposure. The increased series resistance caused a degradation in diode photocurrent linearity. An empirical expression for post-neutron-irradiation changes in photodiode linearity is presented. Neutron-induced changes in the photodiode shunt resistance and dark current were modeled using simple expressions that allow device designers to estimate changes in photocurrent linearity, shunt resistance, and dark current after neutron exposure. No postirradiation change in the ultraviolet quantum efficiency of diodes without recombination in the front region was observed. This suggests that neutron irradiation does not affect the Si-SiO/sub 2/ interface recombination velocity of p-n junction diodes. >

Lossless, broadband monolithic microwave active inductors

Abstract: Lossless, broadband microwave active inductors are proposed for general-purpose use in microwave circuits. These active inductors operate in a wide frequency range with very low series resistance. They are composed of a common-source cascode FET and a feedback FET which is a common-gate FET or a common-gate cascode FET. The loss can be less than 1/8 the loss of the previously proposed active inductor. The inductance value can be controlled by the external control voltage. The configuration and performance of these devices are described. >

Series resistance in a MOS capacitor with a thin gate oxide

Abstract: The effect of series resistance ( R s ) on the MOS capacitor high-frequency C – V characteristics has been studied. A new approximate formula for the dependence of bulk series resistance on gate electrode diameter is proposed. The influence of gate dimensions and substrate impurity type on the value of R s is studied. Finally the contribution of back-contact impedance to the total value of the series resistance is discussed.

Device for automatically ascertaining capacitance, dissipation factor and insulation resistance of a plurality of capacitors

Abstract: An apparatus (Fig. 1, element 10) for automatically measuring characteristics, such as capacitance, dissipation factor and insulation resistance, of each one of a plurality of capacitors. The apparatus includes a predetermined number of test fixtures (38-1 to 38-N), each test fixture being adapted to receive one of the capacitors to be tested, and a plurality of measurement devices (20, 22 and 24) for measuring various parameters. A relay matrix (66), having a plurality of relays therein, is connected such that each test fixture may be connected to one of the measurement devices and to a high voltage source (12) of electrical potential. Also included in the test apparatus is a network (30) for energizing predetermined sequence thereby to connect the capacitor associated with each relay to the desired measurement devices and for controlling the output of the voltage source to apply a predetermined high voltage to each capacitor connected to the source by the energization of a relay. Recording device (26R) associated with the measurement devices for recording the measured values of the capacitor. In the preferred instance the network (30), the controller (26), and the recording device (26R) implemented using a digital computer (not shown) operating in accordance with a program.

Determination of source and drain series resistances of ultra-short gate-length MODFETs

Abstract: A practical method to evaluate the parasitic source and drain series resistances of modulation-doped FETs is presented. The method is based on a modified gate-probe technique that uses the gate current crowding phenomenon. It is suitable for complex heterostructure devices since the carrier transport mechanism and physical structure properties around the gate region need not conform to ideal models. >

Stable gas-dielectric capacitors of 5- and 10-pF values

Abstract: Gas-dielectric capacitors of 5 and 10-pF are described. With Zerodur as the structural material, the capacitors are stable with time, have small temperature and voltage coefficients, and have been used successfully as traveling standards. A relatively large sensitivity to ionizing radiation is observed in these capacitors. >

Low-temperature buffer AlInAs/GaInAs on InP HEMT technology for ultra-high-speed integrated circuits

Abstract: A report is presented on the development of a planar low-temperature buffer AlInAs/GaInAs on InP high-electron-mobility transistor (HEMT) technology for use in digital and analog integrated circuits. This technology is attractive for circuit applications because of the high achievable f/sub T/ and f/sub max/, low output conductance and gate leakage current, and reduced susceptibility to backgating effects. Two alternative logic families-UFL and SCFL (source-couple FET logic)-were chosen for the realization of digital circuits. Measurements on the UFL ring oscillators exhibited a minimum gate delay of 13 ps with a power dissipation of 1.1 mW/gate at room temperature. The gate delay rose to 25 ps when the power dissipation increased to 3 mW/gate. This gate delay is expected to drop significantly with reductions in diode level-shift series resistance and improvements in transistor f/sub T/. The most complex SCFL circuit tested was a divide-by-eight counter. The SCFL circuits were configured as flip-flops in the divide-by-eight mode. The circuit operated at a maximum clock rate of 12.5 GHz. >

Impedance Studies on the Anodic Passivity of Titanium in Aqueous Media of Different pH

Abstract: Impedance measurements for a mechanically polished titanium electrode at different passivation potentials were used in assessing the dependence of the series resistance and capacitance on ...

Semiconductor laser element and its manufacture

Abstract: PURPOSE:To reduce a series resistance value of a laser element by manufacturing a double-heterojunction semiconductor laser element by using a structure where an InAs layer whose band gap is small is formed as a contact layer and an InAs1-zPz composition transition layer is formed between an InAs contact layer and an InP clad layer. CONSTITUTION:In order to use InAs whose band gap is small as a contact layer 18, the height of a Schottky barrier can be lowered and an impurity of high concentration can be doped. An InAs1-zPz layer 17 is formed between an InP layer 14 and the InAs layer 18, and its composition is changed gradually from InP to InAs; by this setup, the band gap can be changed continuously between InP and InAs; obstruction of a movement of a carrier due to discontinuity of a band is eliminated. In this way, a low-resistance electrode 20 can be formed with reference to a P-type; a series resistance value of a laser element can be lowered.

Semiconductor integrated circuit device

Abstract: PURPOSE:To obtain a semiconductor integrated circuit device which can reduce the floating capacity of the periphery of a bonding pad and an influence to a peripheral element by providing a groove on a substrate at the peripheral position of a connecting part to be connected to an external circuit device CONSTITUTION:A groove 2 is formed on a substrate 4 at the peripheral position of a bonding pad 1, capacities 6, 9 are thereby reduced, and the series resistance value of resistors 7, 8 is increased Thus, the attenuation of a signal input to the pad 1 is reduced, and a noise generated at the whole substrate 4 is decreased Since the capacity 9 is reduced and the resistance 7 is increased, an influence of the signal input to the pad 1 to a resistance element 5 can be decreased Further, an impedance between the element 5 and the pad 1 is increased, and the influence of the signal input to the pad 1 to the element 5 can be decreased Thus, the frequency characteristic of an ultrahigh speed semiconductor integrated circuit device is improved, and the influence of an external signal as one of noise generation sources can be eliminated

Semiconductor integrated circuit device

Abstract: PURPOSE:To enhance stability against a capacitive load by a method wherein vertical-structure PNP transistors with a high cutoff frequency are provided as PNP transistors constituting a first-stage differential amplification circuit and PNP transistors constituting a complementary push-pull output-stage amplification circuit in an integrated operational amplification circuit CONSTITUTION:In vertical-type PNP transistors 19, 20, 21, a P-type emitter region 30 is surrounded by an N-type base region 29 and a base width is small; accordingly, a current-amplification factor is high; because a P-type buried layer 27 exists, a collector series resistance value rSC is small and a parasitic capacitance value which is parasitic between a collector and a ground or the like is also small Therefore, a cutoff frequency is high; a frequency which is generated by parasitic poles fP1, fP2 in an operational amplification circuit is high at about 100MHz, and is not oscillated easily As a result, if a capacitance value of a phase compensating capacitor 33 is reduced and the frequency to be generated by the main pole fP1 is increased to 300Hz, a gain bandwidth can be expanded up to a frequency to be generated by another parasitic pole fP4, and a wide band of an operational amplifier can be achieved

Ultimate CMOS density limits: measured source drain resistance in ultra small devices

Abstract: The dependence of the extrinsic component of the series resistance of CMOS devices on the size of the source/drain areas has been explored experimentally. Trench isolated depletion mode n- and p-channel MOSFETs with silicided source/drain areas from 1.7*2 mu m/sup 2/ to 0.2*0.3 mu m/sup 2/ have been fabricated using electron beam lithography. A sheet resistance of 3-5 Omega / Square Operator and a contact resistivity of p/sub c/=3-6*10/sup -7/ Omega -cm/sup -2/ have been obtained for the TiSi/sub 2/ contact technology. The measured extrinsic series resistance is observed to increase rapidly for source/drain sizes below the contact transfer length of 0.6-0.8 mu m and to become larger than the intrinsic series resistance component. Based on these data, the upper limit for the CMOS current drive capability and the lower limit for propagation delay as a function of source/drain size are established. >

Reduction of specific contact resistance on GaInAsP by rapid thermal process anneal

Abstract: An order of magnitude improvement in the specific contact resistance of gold‐based ohmic contacts to p‐type GaInAsP (Eg=1.13 eV) is reported. A novel technique using a silicon susceptor has been employed in a rapid thermal processor. A direct comparison between gold‐based contacts annealed in a conventional furnace and the rapid thermal processor indicated a specific contact resistance of 4.2×10−5 and 4.1×10−6 Ω cm2, respectively. Auger electron spectroscopy, in depth profile mode, revealed two different metallurgical profiles for the conventional furnace and the rapid thermal processor. The rapid thermal processor was successfully implemented in a p‐i‐n optical detector process resulting in a reduction in the device series resistance and improved performance.

Series resistance calculations for polysilicon tunnel junction emitter transistors

Abstract: Calculations are reported of the series resistance caused by the thin insulating layer which separates the polycrystalline and monocrystalline regions of the emitter in certain types of polysilicon emitter transistors. It is demonstrated that the series resistance depends on the shape of the potential barrier which characterizes the thin insulator. For a triangular barrier the series resistance may be low enough for the transistors to be acceptable for very large scale integrated circuit applications.

Photovoltaic power generation device

Abstract: PURPOSE:To reduce a series resistance loss by reducing the series resistance component of a transparent conductor film of a series connection part, by forming a metal film which reduces the resistance of a second electrode on part of the transparent conductor film excepting a part comprising a first electrode formed on a semiconductor substrate, an amorphous layer, and the second electrode composed of the transparent conductor film, all superimposed together. CONSTITUTION:A metal film 5 is formed on a part of a second electrode 4 where a first electrode 2, an amorphous layer 3, and a second electrode 4 are not superimposed. A light enters the title capacitor apparatus from the side of a transparent conductor film (the second electrode) 4 disposed on the opposite side to an insulating substrate 1, and is principally absorbed by an i type region located in the amorphous layer 3 to excite electrons and holes. The electrons and the holes are moved into a n type region and into a p-type region by an electric field formed by the p-and n-type regions, respectively, for thereby generating a photocurrent. The photocurrent so generated is allowed to flow toward the first electrode 2 of the adjacent element on the right from, on one side, the first electrode 2 and from, on the other hand, the transparent conductor film (the second electrode). 4 via the metal film 5. Such formation of the metal film 5 which reduces resistance reduces series resistance to improve the output.

Carbon paste electrode

Abstract: PURPOSE:To make it possible to lower ESR(equivalent series resistance) of an electric double-layer capacitor by heat-treating the activated carbon of a carbon paste electrode at the temperature of 1000 deg.C or higher. CONSTITUTION:In a carbon paste electrode 3a for electric double-layer capacitor which uses mixture of powder activated carbon and electrolytic solution for the electrode, powder activated carbon is heat-treated, and the temperature of heat treatment is made to above 1000 deg.C. When the temperature for heat treatment of the activated carbon is raised, the ESR of the electric double-layer capacitor lowers at above 1000 deg.C and diminishes to about half the conventional one. Hereby, the electric double-layer capacitor with ESR lower than the conventional one can be realized.

Schottky barrier diode clamp transistor

Abstract: A semiconductor device used for, particularly, an output stage of a logic circuit is formed by a Schottky.barrier.diode clamping transistor. A clamping circuit is provided between a collector and a base for clamping a collector potential. The clamping circuit is formed by a Schottky.barrier.diode (SBD) and a series connected resistance coupled to the Schottky.barrier.diode. A collector resistance is divided by resistance division using the series resistance (FIG. 6).

Series addition of ballistic resistors

Abstract: We have measured the series resistance of two ballistic resistors, or quantum point contacts, in two configurations. First when the resistors are co-linear we measure the series resistance and the intermediate voltage between the resistors. Using a simple model we calculate the ballistic transport coefficient from the data. We find that the highest values are obtained when one channel is much wider than the other. Poorest transmission is always obtained when the two channels are identical. Secondly, we investigate two quantum point contacts perpendicular to each other. We find that in zero field the resistances and classically but that the transmission coefficient increases if either the magnetic field or the width of the constriction in the ballistic resistors is increased.

A GaAs monolithic array of impedance matched antenna/detector pixels for a 94 GHz imaging system

Abstract: The design, fabrication, and performance of a 4*4 pixel array of monolithic GaAs 94-GHz detector circuits is described. This large chip is developed to be a tile for much larger arrays consisting of thousands of pixels for 94-GHz imaging. Each pixel is a slot antenna on one face coupled through the GaAs to a microstrip circuit containing a Schottky-barrier diode on the opposite face. The microstrip circuit provides an optimum impedance match between the diode and the slot antenna so that no additional tuning to free space is required. The diode is fabricated using a selective ion implantation process optimized for uniformity, repeatability, and yield, and has zero-bias capacitance and series resistance, respectively, of 14 fF and 15 Omega . Process control is essential, because variations in diode parameters can mismatch and detune the circuit. With the diode optimally forward-biased for square-law operation and a video bandwidth of 1 MHz, the tangential signal sensitivity (TSS) peaked in the 92-96-GHz range and was always better than -50 dBm at 94 GHz. >

On the evaluation of ferroelectric nonlinear capacitors for application in power circuits

Abstract: A method for selecting ferroelectric capacitors as nonlinear components for application in turn-off snubber circuits for power electronic switches is investigated. By initiating, without destroying, localized events in the dielectric layer of a multilayer capacitor, such capacitors can be selected (and some of them also stabilized) by observing the number of events and the rate of events. This is achieved by exposing them to a high field strength by means of the application of a high voltage from ahigh-impedance source. The observed phenomena confirm that the conduction is mainly by electrons. An explanation for the instabilities in the steady-state DC current under increasing voltage as observed by other authors is proposed. Components which have been selected in this manner allow the usage of these capacitors at extremely high voltages (approximately 4 to 6 times the rated voltage for linear applications). An apparatus for the selection and stabilization is developed. The selected capacitors have a ratio of capacitance at zero voltage to that at the maximum operating voltage of approximately 10:1. The criteria for selecting capacitors for nonlinear applications (these applications are at high field strengths) are discussed. Preliminary results are given for applications of these capacitors in power electronic switching circuits. >

Integrated circuit containing schottky barrier diode and its manufacture

Abstract: PURPOSE: To enhance the clamp effect and reduce the series resistance of a clamp diode by forming a trench, expanding from the extrinsic base of a bipolar transistor to the collector to form a partly vertical clamp diode CONSTITUTION: A transistor 30 comprises a P -Si substrate 32, N -buried layer 34, an isolated region 36, P -channel stop 38, N -collector 40, P-active base 42, N -emitter 44, N -polysilicon emitter contact 46, P -extrinsic base 48, a Pt silicide layer 50 which forms a Schottky barrier diode with the collector 40 and ohmic contact with the extrinsic base 48, an N -collector contact 52, a collector metal contact 54 and an insulation oxide 56 This increases the diode area, reduces the distance to the buried layer to thereby reduce the series resistance of the diode and enhance the clamp effect

Circuit for printed wiring board

Abstract: PURPOSE:To decrease the kinds of materials when a multi item, small batch production system is carried out, by possessing a circuit pattern through which several kinds of circuits having different numbers of semiconductor memory elements are made by only one of a printed wiring board according to actual mounting aspects of resistance elements. CONSTITUTION:A plan for making several kinds of circuits is realized by selecting a series resistance 10a, a grounding resistance 10b, and a jump resistance 10c between control lines 4 and 9. For example, two pieces of elements out of semiconductor memory elements 1, a semiconductor decoder 7, and a pull-down resistance 10b are used whilst the series resistance 10a and the jump resistance 10c are not used in this case. Further, four pieces of the semiconductor memory elements 1, the semiconductor decoder 7, and the series resistance 10a are used whilst the pull-down resistance 10b and the jump resistance 10c are not used in this case.

Transformer protective device

Abstract: PURPOSE:To avoid a local concentration of potential by a method wherein a filter composed of an LC series circuit is connected between the terminals of a transformer, the resonance frequency of the filter is allowed to coincide with to the resonance frequency of the transformer winding, and the admittance value against the admittance of the transformer in the vicinity of the above- mentioned frequency is increased sufficiently. CONSTITUTION:An AC power source 5 is connected to a vacuum circuit-breaker 3 through the intermediary of a power cable 4, and the AC power source 5 is connected to the primary side winding of a transformer 1 through the interme diary of the filter 2 consisting of a capacitor 21 and a coil 22. In this constitu tion, the inductance of the coil 22 is set at LF, the capacitance of the capacitor 21 is set at CF, the equivalent resistance of the coil and the capacitor is set at RF, the equivalent impedance constituting the impedance in the vicinity of the resonance frequency of the transformer winding is set at Lr, equivalent capacitance is set at Cr, the product of LF and CF is made equal to the product of Lr and Cr when the equivalent resistance is indicated by the series circuit of Rr, and the LF is made smaller than the Lr, and the RF is also made smaller than the Rr.