Showing papers on "Fault current limiter published in 2022"

A Current Limiting Method for Single-Loop Voltage-Magnitude Controlled Grid-Forming Converters During Symmetrical Faults

Abstract: This article proposes a current limiting method for single-loop voltage-magnitude controlled grid-forming (GFM) converters to avoid overcurrent during symmetrical faults. The proposed method consists of two parts, which are the outer power reference adjustment to limit the steady-state fault current, and a transient virtual resistor, implemented by directly modifying the modulation voltage reference, to limit the transient fault current during fault-inception and -clearing periods. Furthermore, a nonlinear dynamic model for the GFM converter with the proposed control is developed, and the phase portrait is plotted to reveal the influences of power reference adjustment and of transient virtual resistor control on the transient stability. Finally, experimental tests confirm that the proposed method can effectively limit the fault current to an admissible value while simultaneously keeping the GFM mode during fault ride-through.

Superconducting fault current limiter (SFCL) for a power electronic circuit: experiment and numerical modelling

Abstract: In this article, the superconducting fault current limiter (SFCL) explores its relatively new application: the power electronic circuit. The investigation of this compact-size SFCL involves both the experiments and numerical modelling. A bifilar-shape resistive-type SFCL was used in a DC-DC power conversion circuit, for the purpose of suppressing the overwhelming fault current by 3 different types of faults: the input fault, output fault, and switch fault. The numerical modelling of SFCL used an electromagnetic-thermal coupled finite-element method (FEM) model based on the H -formulation. For these 3 types of faults with the 100 ms fault duration, good agreement was found between the experiments and simulations. Both the experiment and modelling method were used to test the SFCL performance with different fault durations (50 ms vs 100 ms). For some severe fault conditions (e.g., higher fault current and longer fault duration) that experiments were difficult or unable to realise, the FEM modelling of SFCL was used to simulate the performance. Overall, the FEM modelling of SFCL can well match the SFCL experiment, and has the advantage of showing more information such as the current distribution and temperature. Both the SFCL experiments and numerical modelling offer new results and novel concepts of SFCL investigation, which can be helpful for the design of future SFCLs and the compact protection schemes for power electronic devices.

Impact of PLL Frequency Limiter on Synchronization Stability of Grid Feeding Converter

Abstract: It is well known that grid-feeding converters that synchronize to the grid through a Phase-Locked Loop (PLL) can become unstable after a fault. An often-neglected element that plays an important role in the converter synchronization stability is the PLL frequency limiter. While it slows down the phase change during the fault, the frequency limiter also constrains the error of the PLL input, thus leading to a longer settling time. This letter investigates the mechanism of the converter synchronization stability caused by the frequency limiter and provides a taxonomy to evaluate its impact on the overall system dynamic response.

Air-Core-Transformer-Based Solid-State Fault-Current Limiter for Bidirectional HVdc Systems

Abstract: Modular multilevel converter (MMC) high-voltage direct current (HVdc) transmission is a promising method to integrate renewable energies. However, limiting the dc-link fault current and accelerating the fault-current clearance are critical issues for MMC-HVdc systems. In this article, we propose an air-core-transformer-based fault-current limiter (ACT-FCL) in cooperation with the dc circuit breaker to limit fault-current rising and decrease fault-clearing time. Compared with the conventional dc reactor, hybrid current-limiting circuit, current-commutation-based fault-current limiter (FCL), and magnetic coupling FCL, the ACT-FCL can increase the equivalent inductance during the dc fault stage to reduce the rising rate and peak of fault current. The ACT-FCL can also decrease the equivalent inductance during the fault-current-clearing stage to reduce the fault-clearing time. The simulations and laboratory experiments verify the effectiveness of the proposed ACT-FCL in the bidirectional HVdc systems. The ACT-FCL may be extended to more fields, such as dc microgrid and domestic dc transmission.

Improving Fault Ride-Through in meshed microgrids with wind and PV by Virtual Synchronous Generator with SFCL and SMES

Abstract: Voltage drop during fault can affect the performance of generation units such as wind turbines. Due to low inertia, virtual synchronous generator (VSG) exhibits poor performance during the fault. The superconducting fault current limiter (SFCL) and superconducting magnetic energy storage (SMES) can improve the fault ride-through (FRT) properties in doubly-fed induction generator (DFIG) and photovoltaic (PV) systems. This paper investigates the FRT property in a meshed microgrid including wind and PV units with a virtual synchronous generator controller. To improve the fault-ride-through, an SFCL and an SMES are proposed, whose optimal locations are obtained considering an objective function including the power deviation of the point of common coupling (PCC), DFIG voltage deviation, maximum fault current, and equipment specifications. Particle swarm optimization (PSO) is used for solving the optimization problem. The effect of SFCL and SMES on the reduction of voltage drop and power fluctuations and also on limiting the maximum fault current of distribution lines is analyzed. Finally, the status of the studied system variables is investigated in two scenarios associated with various fault locations with equipment optimally allocated.

Progress on Second-Generation High-Temperature Superconductor Tape Targeting Resistive Fault Current Limiter Application

Abstract: The resistive superconducting fault current limiter is well known for its simple structure and outstanding current-limiting effect, and it is broadly applied in power grid systems. The second-generation high-temperature superconductor (HTS) tape, of higher structural strength and greater room-temperature resistance, is well suited for application in resistive superconducting fault current limiters. The quenching caused by overcurrent in the HTS tape is a complexed coupling effect of several physical factors. The tape structure and properties directly impact the ultimate HTS tape’s quench performance. In this study, various SS316-laminated HTS tapes, of different critical currents, room-temperature resistances, and masses, were prepared. The pulse impact parameters of the various tape samples were measured using the RLC high-current impact test platform. By analyzing the resultant data, a quantitative assessment methodology to measure a tape’s tolerance toward impact was developed. The dependence of the HTS tape’s tolerance toward impact on its critical current, room-temperature resistance, and mass was studied. This provides numerical guidance on HTS material selection for resistive superconducting fault current limiters.

Study of Resistive Superconducting Fault Current Limiters for Stability Improvement of VSG-Controlled Multiple Microgrid Clusters

Abstract: Multiple microgrid (multi-MG) clusters based on virtual synchronous generator (VSG) control can preferably incorporate renewable energies. Nevertheless, the power angle stability (PAS) of VSG–controlled multi-MG clusters is easy to be influenced by grid faults. In this paper, resistive superconducting fault current limiters (R–SFCLs) are introduced to deal with this PAS problem. It is designed to install the R-SFCLs at the point of common coupling (PCC) of each MG in the clusters. The transient stability mechanism based on power balance and swing equation is analyzed to clarify the impacts of the R-SFCLs. Through MATLAB, a simulation model of three VSG-controlled MGs with R-SFCLs is built, and different fault scenarios are imitated for checking the performance behaviors of the R-SFCLs. From the simulation results, the R-SFCLs can visibly suppress the overcurrent inrush and assist the MGs in the clusters to fulfill the fault-ride through (FRT). Moreover, the energy dissipation of the R–SFCLs is calculated, and an improved power balance property is obtained in the multi-MG clusters to alleviate the power-angle fluctuations. Consequently, the effectiveness of the R–SFCLs on reducing the relative power angle variation is demonstrated, and the transient stability of the multi-MG clusters withstanding the three-phase faults is favorably enhanced.

An Improved Hybrid DC Circuit Breaker With Self-Adaptive Fault Current Limiting Capability

Abstract: The effective fault current limiting is very significant for the dc distribution system. However, the traditional dc fault current limiting method, i.e., directly installing dc reactor, may trigger negative impacts the system normal operation and fast isolation of the circuit breaker. Therefore, an improved hybrid dc circuit breaker with self-adaptive fault current limiting capability is proposed in this article. Not only can it realize fault current limitation in a quick and efficient manner, but also ensures the continuous operation of the converter and the fault ride-through of the healthy network after the dc fault. In this sense, the requirements on the protection and arrester capacity are reduced. Compared with other types of fault current limiting methods, the proposed topology has the merit of few negative effects on system stability and transient response. It can effectively perform fault current limiting and fault isolation, with low conduction loss and low implementation difficulty. The working principle and advantages of the proposed topology are verified by experimental tests and simulation cases.

Numerical Study on the On-Grid Performance of Superconducting Cable Cooperated With R-SFCL

Abstract: The high temperature superconducting (HTS) cable has shown promising prospects in megacities for the advantages of high transmission power density and low loss. However, when HTS cable is working on grid, various kinds of faults may cause irreversible damage, resulting in the failure of reclosing. In this paper, the resistive superconducting fault current limiter (R-SFCL) is introduced into the power system to cooperate with the HTS cable, so as to reduce the potential damage caused by fault current. Firstly, the equivalent circuit models are established, and then transient response of HTS cables under fault condition is analyzed, the recovery time of HTS tapes are used to define the design of R-SFCL. Finally, the operating reliability of HTS cable has been evaluated and measures about adaptive reclosing times were proposed under different fault currents.

A Novel Fast Energy Storage Fault Current Limiter Topology for High-Voltage Direct Current Transmission System

Abstract: The traditional saturated core type fault current limiters (TFCLs) cause large energy absorption and high overvoltage in direct current circuit breakers (DCCBs). Energy absorbing FCLs (AFCLs) cause coils to bear the fault current for a long period and the fault energy absorption is slow. In order to solve the problems of TFCLs and AFCLs, a novel fast energy storage dc FCL (EFCL) topology is proposed in this article. The EFCL not only reduces the overvoltage and energy absorption of DCCBs but also quickly stores energy. First, the working principle and topology of the EFCL are proposed. The design requirements of the main electrical and core size parameters are then analyzed. Then, the key electrical parameters are optimized by electromagnetic circuit simulations. The economy is analyzed. Finally, the whole process simulation and FCL comparison simulation are carried out. The feasibility of the EFCL is verified by the comparison of simulation with experiment.

A 3-D Finite-Element Method Approach for Analyzing Different Short Circuit Types in a Saturated Iron Core Fault Current Limiter

Abstract: In several cases, substations have become incapable of supporting faults due to increase in short-circuit levels. Fault current limiters (FCLs) are a potential solution for this problem. Among several FCL topologies presented in the literature, the saturated iron core superconducting fault current limiter (SIC-SFCL) has shown promising results in real tests in substations. In this context, this article presents the impacts of different kinds of short circuit on the SIC-SFCL device. To reproduce various types of fault, the SIC-SFCL is modeled in a 3-D framework considering both ferromagnetic and superconducting nonlinearities. Moreover, the proposed 3-D finite-element method model can couple the SIC-SFCL to the electric power system, also representing the electrical grid and the protection systems. For this investigation, the dc-bias superconducting coil’s normalized current density and the iron cores’ magnetic flux density are examined in light of different kinds of short circuit. The simulations are compared with measurements in a bench prototype, showing a maximum error of 16.5%. Furthermore, different types of short circuit are investigated and compared, which is possible only using a 3-D model. The highest limitation occurs in the phase-to-phase short-circuit case. In the dc circuit of the SIC-SFCL, the highest transient period happens in the single-phase short circuit. Finally, the phase-to-phase fault presents the highest dc current during the transient.

A Self-Activated Fault Current Limiter for Distribution Network Protection

Abstract: Rapid protection of modern electric networks using fault current limiters (FCLs) is often delayed and limited by the inherent controller, sensor, and power electronic unit delays. This article proposes a novel self-activated FCL (SAFCL), comprising a dc saturation winding, series ac limiter windings, and ac parallel reactor, which limits the fault current in less than 0.4 ms. Furthermore, the advantage of this SAFCL, when compared to a traditional saturated core FCL (SCFCL), is that it does not rely on any external controller, sensor, controllable solid-state switch, and battery. In the normal state, the SAFCL behaves like a saturated reactor with a very low impedance and in the fault state, cores are entered to the unsaturation region without relying on an external controller which imposes a high impedance to limit the fault, rapidly. The performance of the SAFCL is evaluated through off-line MATLAB and Maxwell ANSYS FEM simulations, and is also validated by experimental studies conducted on a scaled-down prototype.

Fault Recovery Analysis of Grid-Forming Inverters With Priority-Based Current Limiters

Abstract: Grid-forming (GFM) inverters are required to operate robustly against grid faults. However, due to the limited over-current capability of inverters, current-limiting controls are usually applied to protect these semiconductor devices, which may prevent GFM inverters from a successful fault recovery. To understand this phenomenon, this study analyzes the fault recovery process of a GFM inverter with a priority-based current limiter. According to whether the GFM inverter can ensure transient stability and exit the current-limiting mode after fault clearance, three post-fault scenarios are identified, including normal operation, current limitation, and oscillations . Further, the impacts of the short-circuit ratio and control parameters on the post-fault behavior of GFM inverters are demonstrated. To illustrate the implications of these theoretical results, typical numerical examples are presented. Finally, the theoretical findings are validated through experimental tests.

Stationary-Frame Grid-Forming Inverter Control Architectures for Unbalanced Fault-Current Limiting

Abstract: Grid-forming (GFM) control offers promising performance features for inverter-based resources (IBRs) across scales. However, design, analysis, and benchmarking of GFM IBRs during unbalanced faults remains largely unexplored. In this article, we outline a stationary-reference-frame nested-loop control architecture for GFM IBRs and integrate the same with novel current-limiting strategies. The architecture improves on virtual-impedance and current-reference-saturation limiting as well as state-of-the-art methods for control of voltage-source inverters. Electromagnetic-transient simulations for a modified IEEE 14-bus network validate salient features of the proposed control architectures. The proposed virtual-impedance limiter is shown to provide better voltage support during faults than the current-reference-saturation limiter (quantified via sequence voltages). On the other hand, the current-reference-saturation limiter offers better (and more accurate) fault-current contribution.

An AC Fault Ride Through Method for MMC-HVDC System in Offshore Applications Including DC Current-Limiting Inductors

Abstract: The current-limiting inductors (CLIs) are commonly used to suppress DC fault current to safely trip DC circuit breakers in MMC-HVDC systems, but it significantly jeopardizes DC dynamics and causes instantaneous power mismatch between AC and DC sides of islanded rectifier station (RS), exposing MMC internal states to large disturbance. This paper firstly provides a detailed analysis of the influence of CLIs on AC fault, establishes RS mathematical representation including AC side dynamic, and reveals the mechanism of DC voltage oscillation, modulation saturation and PCC waveform distortion. The analysis shows that the AC and DC fault characteristics are decoupled under unsaturated AC modulation, but coupled under excessively low submodule capacitor voltage, where AC modulation is saturated and PCC waveforms are distorted. To solve this issue, a novel RS AC fault ride through method for MMC-HVDC system with CLIs is proposed to stabilize RS DC voltage, desaturate AC modulation and decouple fault characteristics by regulating the zero-sequence modulation of circulating current suppression. In addition, a current reference disturbance and an AC energy dissipation device coordinated control are designed, which adaptively recovers the submodule capacitor voltage. Finally, the feasibility of the proposed method is verified by simulation results.

Development of a Hybrid Fault Current Limiter Using Liquid Metal for Large Capacity MVdc Power Systems

Abstract: A hybrid fault current limiter (FCL) for medium-voltage direct current power systems is introduced in this article. It achieves low operation loss and high current limiting resistance through the combination of a fast mechanical switch, a magnetic induction module, and a number of liquid metal units (LMUs). First, the parameters of the magnetic induction module are designed to achieve a desired fault current commutation process. Then, the working principle of LMU is introduced, and its resistance properties corresponding to the liquid metal arc are studied in detail. Equations are deduced to model the V-I characteristic of LMU. Thus, the current limiting performance of the topology can be simulated. To verify the feasibility of the FCL, a 5-kV/5-kA prototype is developed and laboratory tests are implemented. Comparisons with other FCLs are also conducted to demonstrate the advantages of the proposed one. It is concluded that the prototype provides the basis for further commercial product development.

A Nonlinear Backstepping Control Scheme for Rapid Earth Fault Current Limiters in Resonant Grounded Power Distribution Systems: Applications for Mitigating Powerline Bushfires

Abstract: This article presents a nonlinear backstepping control scheme for rapid earth fault current limiters (REFCLs) in resonant grounded power distribution systems to mitigate the severity of powerline bushfires. The main feature of the proposed control scheme is that it quickly eliminates both active and reactive components of the fault current to make it zero for reducing the chance of igniting bushfires. The nonlinear backstepping control scheme is employed on the dynamical model of a REFCL equipped with a T-type inverter. The desired tracking of the fault current is ensured with the proposed scheme by appropriately injecting the current to the neutral point. The performance of the controller is evaluated in terms of the fault current and faulty phase-to-ground voltage under different fault conditions while following the standard criteria for the practical operation. The fault current compensation capability of the proposed scheme is evaluated for both low and high impedance faults. Simulation results in software and processor-in-loop platforms clearly demonstrate the fault current is limited to a value much lower than its desired value of 0.5 A in less than 1 s, which means that the chance of igniting bushfires will be reduced with the proposed controller.

A novel fault current limiter topology design based on liquid metal current limiter

Abstract: Liquid metal current limiter (LMCL) is regarded as a viable solution for reducing the fault current in the power grid, but demonstrating the liquid metal arc plasma self-pinching process of the resistive wall and reducing the erosion of LMCL are challenging not only theoretically but also practically. In this work, a novel LMCL is designed with a resistive wall that can be connected to the current-limiting circuit inside the cavity. Specifically, a novel fault current limiter (FCL) topology is put forward that the novel LMCL is combined with fast switch and current-limiting reactor. Further, the liquid metal self-pinch effect is modeled mathematically in three dimensions and the gas-liquid two-phase dynamic diagrams under different short-circuit currents are obtained by simulation. The simulation results indicate that with the increase of current, the time for the liquid metal-free surface begins depressing is dropped, and the position of the depression also changes. Different kinds of bubbles formed by the depressions gradually extend, squeeze, and break. With the increase of current, liquid metal takes less time to break. But the breaks still occur at the edge of the channel, forming arc plasma. Finally, relevant experiments are conducted for the novel FCL topology. The arcing process and current transfer process are particularly analyzed. Comparisons of peak arc voltage, arcing time, current limiting efficiency, and electrodes erosion are presented. The results demonstrate that arc voltage of the novel FCL topology is reduced by more than 4.5 times and the arcing time is reduced by more than 12%. The erosions of liquid metal and electrodes are reduced. Moreover, the current limiting efficiency of the novel FCL topology is improved by 1%‒5%. This work lays a foundation for the topology and optimal design of LMCL.

Active Fault Current Limitation for Low-Voltage Ride-Through of Networked Microgrids

Abstract: With the continuously increasing penetration of networked microgrids (MGs) on the local utility grid (UG), MGs face the challenge to avoid increasing system fault currents during low-voltage ride-through (LVRT). To solve this challenge, an active fault current limitation (AFCL) method is proposed with three parts: 1) a novel phase angle adjustment (PAA) strategy is conducted to relieve the impact of MGs output fault current on system fault current; 2) the current injection (CI) strategy for LVRT is formulated to fit the function of PAA; 3) a novel converter current generation (CCG) strategy is developed to achieve a better voltage support ability by considering network impedance characteristics. The proposed AFCL method is applied to the back-to-back converter, as a connection interface between MGs and UG. Extensive tests and pertinent results have verified the improvements of proposed AFCL method with better LVRT performance, while the networked MGs output fault current does not increase the amplitude of system fault current.