Showing papers on "Transmission delay published in 1988"
TL;DR: A nonblocking, self-routing copy network with constant latency is proposed, capable of packet replications and switching, which is usually a serial combinations of a copy network and a point-to-point switch.
Abstract: In addition to handling point-to-point connections, a broadband packet network should be able to provide multipoint communications that are required by a wide range of applications. The essential component to enhance the connection capability of a packet network is a multicast packet switch, capable of packet replications and switching, which is usually a serial combinations of a copy network and a point-to-point switch. The copy network replicates input packets from various sources simultaneously, after which copies of broadcast packets are routed to their final destination by the switch. A nonblocking, self-routing copy network with constant latency is proposed. Packet replications are accomplished by an encoding process and a decoding process. The encoding process transforms the set of copy numbers, specified in the headers of incoming packets, into a set of monotone address intervals which form new packet headers. The decoding process performs the packet replication according to the Boolean interval splitting algorithm through the broadcast banyan network, the decision making is based on a two-bit header information. This yields minimum complexity in the switch nodes. >
387 citations
TL;DR: Comparisons to simulations using data collected from real conversations show that the packet loss can be determined accurately if the delay limit is less than 400 ms and more than half the packet length.
Abstract: In a packet-speech multiplexer with limited delay, packets arriving once the queue has reached a certain limit are either discarded, or if embedded encoding has been used, shortened. The uniform arrival and service model, which assumes that the information flow in and out of the multiplexer is uniform rather than in discrete packets, is used to analyze such a multiplexer. The equilibrium queue distribution is described by a set of differential equations that can be solved, together with a set of boundary equations describing the queue behavior at its limits, to yield equilibrium distributions of delay and packet loss. Comparisons to simulations using data collected from real conversations show that the packet loss can be determined accurately if the delay limit is less than 400 ms and more than half the packet length. >
187 citations
Book•
01 Dec 1988
TL;DR: In this paper, the authors consider the case of a packet switch with infinite storage and show that such a switch can never run out of buffers, but it can still become congested.
Abstract: Most prior work on congestion in datagram systems focuses on buffer management. We find it illuminating to consider the case of a packet switch with infinite storage. Such a packet switch can never run out of buffers. It can, however, still become congested. The meaning of congestion in an infinite-storage system is explored. We demonstrate the unexpected result that a datagram network with infinite storage, first-in, first-out queueing, at least two packet switches, and a finite packet lifetime will, under overload, drop all packets. By attacking the problem of congestion for the infinite-storage case, we discover new solutions applicable to switches with finite storage.
181 citations
04 Mar 1988
TL;DR: In this paper, a buffer management system for a general multipoint packet switching network is proposed, which determines whether a packet should be stored, retransmitted, or discarded during an overload condition by identifying each incoming packet as either an excess packet or a nonexcess packet based on the number of packets stored in the memory array.
Abstract: A Buffer Management System for a general multipoint packet switching network where the network has terminals transmitting data in the form of packets belonging to multiple channels over communication links through a packet switch array, the packet switches of the array receiving incoming packets from input data links and having memory arrays for temporarily storing the incoming packets for retransmitting the stored packets over output links. The Buffer Management System determines whether a packet should be stored, retransmitted, or discarded during an overload condition by identifying each incoming packet as either an excess packet or a nonexcess packet based on the number of packets stored in the memory array of the same channel as the incoming packet, and writing an incoming nonexcess packet into the memory array when the memory array is full and at least one excess packet is in the memory array and for discarding the excess packet from the memory array.
142 citations
Patent•
11 Oct 1988TL;DR: In this paper, a self-routing multistage switching network for a fast packet switching system suitable for multimedia communication is proposed. But it is not suitable for wireless networks.
Abstract: A self-routing multistage switching network for a fast packet switching system suitable for multimedia communication. The self-routing multistage switching network has packet buffer means for storing packets, provided only in an input stage and respectively connected to input ports, and switching networks having no packet storing function and provided after the packet buffer means. The self-routing multistage switching network detects beforehand while packets are transmitted therethrough whether or not the packets are transmitted therethrough instead of being discarded, reports information for identifying the packets which are transmitted instead of being discarded backward to the packet buffer means through transmission routes through which the packets have been transmitted, and deletes the packets stored in the packet buffer means and corresponding to the packets which are allowed to be transmitted through the self-routing multistage switching network after sending out the same packets. The self-routing multistage switching network is capable of transmitting a plurality of packets for a piece of comunication without entailing outrun between the packets.
115 citations
TL;DR: The protocol provides better delay versus throughput behavior for fixed packet lengths than previous round-robin schemes, its performance is insensitive to bus characteristics, and it appears to be particularly well suited for fiber-optic network applications requiring long distances and high bandwidths.
Abstract: A protocol for multiaccess communication over unidirectional bus networks is proposed, and its performance capabilities are determined. Under this protocol, time is slotted with a slot equaling a packet's transmission time. A station with a packet to send persists in transmitting its packet in an empty slot with probability p/sub i/ until it is successful. Three criteria for fairness in selection of the p/sub i/ are modeled using Markov chains, which are solved to obtain the proper p/sub i/ that satisfy each fairness criterion. Unlike previous studies of unidirectional bus networks, stations are allowed to buffer more than one packet. The average packet delay for this protocol is bounded, and the maximum achievable throughput approaches unity with increasing buffer size. Further, the protocol provides better delay versus throughput behavior for fixed packet lengths than previous round-robin schemes, its performance is insensitive to bus characteristics, and it appears to be particularly well suited for fiber-optic network applications requiring long distances and high bandwidths. Simulation results that confirm the predicted performance are included. >
107 citations
TL;DR: The author introduces the concept of channel group as a set of broadband packet channels that is viewed as a single data-link connection by routing entities that allows super-rate switching, i.e., the support of services with peak bandwidth exceeding the capacity of a single packet channel.
Abstract: The problem of bandwidth allocation in a packet switch supporting broadband services is addressed. To reduce the performance constraints imposed by limiting a data link to a single broadband packet channel, the author introduces the concept of channel group as a set of broadband packet channels that is viewed as a single data-link connection by routing entities. He uses a two-step bandwidth allocation scheme. At connection setup time, a call is allocated to a channel group. At transmission time, specific channels of a group are optimally allocated to the packets destined to the group. Because of the statistical smoothing of the large number of sources served by a channel group, the traffic performance of the switch is improved. This scheme also allows super-rate switching, i.e., the support of services with peak bandwidth exceeding the capacity of a single packet channel. The author shows the feasibility of this scheme in a Batcher-banyan switch, by implementing in hardware the bandwidth allocation at transmission time. Performance improvements obtained by this scheme are also provided in different traffic environments. >
104 citations
27 Mar 1988
TL;DR: Two specific approaches using the knockout switch to provide a practical and efficient means for multicast services under both light and heavy traffic conditions are proposed.
Abstract: The knockout switch is a packet-switch architecture recently proposed for high-performance packet networks. In addition to providing point-to-point connections among user pairs, a packet network must often support multicast and broadcast capabilities. Multicast connections differ from point-to-point connections in that each packet is addressed to a number of destinations. Two specific approaches using the knockout switch to provide a practical and efficient means for multicast services under both light and heavy traffic conditions are proposed. The first involves packet duplication and is more suitable for light traffic loads. The second uses a fast address comparison technique and is capable of handling larger loads. In both cases, the knockout principle is utilized to yield the best delay-throughput performance, guarantee the first-in first-out packet sequence, and provide for a simple, modular implementation. >
94 citations
TL;DR: A 32×32 prototype packet switch is described, built as a part of a broadband ISDN prototype, which has a per-port capacity of 30–55 Mbit/s.
Abstract: We introduce a new method, called ring reservation, to design high-capacity packet switches. Input buffering is used with output port reservations to eliminate packet collisions. We describe a 32×32 prototype packet switch, built as a part of a broadband ISDN prototype, which has a per-port capacity of 30–55 Mbit/s.
90 citations
IBM1
TL;DR: The authors model the internal structure of a packet-switching node in a real-time system and characterize the tradeoff between throughput, delay, and packet loss as a function of the buffer size, switching speed, etc.
Abstract: The authors model the internal structure of a packet-switching node in a real-time system and characterize the tradeoff between throughput, delay, and packet loss as a function of the buffer size, switching speed, etc. They assume a simple shared-single-path switch fabric, though the analysis can be generalized to a wider class of switch fabrics. They show that with a small number of buffers the node will provide a guaranteed delay bound for high-priority traffic, a low average delay for low-priority traffic, no loss of packets at the input and low probability of packet loss at output. >
80 citations
Patent•
30 Mar 1988TL;DR: In this paper, a method and apparatus for allocating bandwidth in a broadband packet switching network are disclosed, which utilizes channel groups, which may be defined as a set of parallel packet channels that act as a single data link connection between packet switches.
Abstract: A method and apparatus for allocating bandwidth in a broadband packet switching network are disclosed. The invention utilizes channel groups (112) which may be defined as a set of parallel packet channels that act as a single data link connection between packet switches (110). In accordance with the invention, bandwidth is allocated in two steps. At virtual circuit setup time, bandwidth is reserved in particular channel groups. At transmission time packets are assigned to individual channels within the groups, illustratively, using a coordination mechanism in communication with the input ports of the appropriate packet switch. The bandwidth allocation technique, known as multichannel bandwidth allocation, leads to increased throughput and reduced packet loss probabilities.
27 Mar 1988
TL;DR: The authors study the performance of four different approaches for providing the queuing necessary to smooth fluctuations in packet arrivals to a space-division packet switch, which results in completely shared buffering.
Abstract: The authors study the performance of four different approaches for providing the queuing necessary to smooth fluctuations in packet arrivals to a space-division packet switch. They are (1) input queueing, where a separate first-in, first-out (FIFO) buffer is provided at each input to switch; (2) input smoothing, where a frame of b packets is stored at each of the N input lines to the switch and simultaneously launched into a switch fabric of size Nb*Nb; (3) output queuing, where packets are queued in a separate FIFO buffer located at each output of the switch; and (4) completely shared buffering, where all queuing is done at the outputs and all buffers are completely shared among all the output lines. >
Patent•
05 Dec 1988
TL;DR: In this paper, a method of operating a high speed, error-free data transmission system in a noisy medium comprises compressing data determined to be compressible, forward error correcting the data and interleaving the data in a bit matrix memory to enhance the forward error correction.
Abstract: A method of operating a high speed, error-free data transmission system in a noisy medium comprises compressing data determined to be compressible, forward error correcting the data and interleaving the data in a bit matrix memory to enhance the forward error correction. Digital information packets are formulated including a header bearing a packet number, the total packet byte count, any packet number resend request, the data byte count of the actual data and a CRC. The digital information packet is loaded onto a transmitter carousel having a fixed number of sectors. The receiver receives the data, requests resend of any packet (by number) that is defective, error corrects if necessary and sequentially loads the packet onto a receiver carousel. Packets or sequential packet groups are removed from the carousel, selectively decompressed and the data words extracted and sent to the output.
Patent•
NEC1
TL;DR: In this paper, a data packet transmitted from a source data terminal is received by a destination data terminal and stored into a receive buffer from which it is withdrawn at a rate which may differ from the rate of transmission of packets from the source terminal.
Abstract: A data packet transmitted from a source data terminal is received by a destination data terminal and stored into a receive buffer from which it is withdrawn at a rate which may differ from the rate of transmission of packets from the source terminal. The destination terminal returns an acknowledgment packet in response to each data packet being withdrawn from the receive buffer. The acknowledging packet includes a flow control variable which is incremented by a unit value in response to the data packet being withdrawn from the receive buffer. The source terminal transmits one or more data packets having sequence numbers the largest of which is determined by a maximum number of outstanding data packets awaiting receipt of the acknowledging packet by the source data terminal and the flow control variable contained in the acknowledging packet.
Patent•
18 Feb 1988TL;DR: In this article, a header driven packet switching system including packet header processing circuits (41, 42... 4 m) for controlling the routing and header rewriting of data packets is presented, which is the hunted type and is arranged independently from incoming lines (11 - 1 n).
Abstract: A header driven packet switching system including packet header processing circuits (41, 42 ... 4 m) for controlling the routing and header rewriting of data packets. The packet header processing circuits are the hunted type and are arranged independently from incoming lines (11 - 1 n) so that the packet switching capacity of the system will be improved, a high speed packet switching realized, and an improved flexibility of the system against traffic congestion will be obtained. In addition, it is possible to arrange the pocket header processing circuits (41, 42 ... 4m) according to traffic conditions.
Patent•
13 May 1988
TL;DR: In this article, the basic switching modules called configuration units connected to the network are interconnected to each other to form a hierarchic tree structure of which the number of hierarchic levels can be selected depending on a size of the packet switched network.
Abstract: In order to enable an expansion of a packet switched network and a constitution change thereof to be readily achieved in a multistage switched network constitution, in a packet switched network including a packet data terminal, a packet switching equipment, a PBX, a multiplexer, an LAN, a voice communication apparatus such as a telephone set, and a facsimile or in a linkage between switching modules in a packet switching apparatus, the basic switching modules called configuration units connected to the network are interconnected to each other to form a hierarchic tree structure of which the number of hierarchic levels can be selected depending on a size of the packet switched network. Furthermore, in order to increase the reliability of the packet data transfer in the multi-stage switched network configuration, there are disposed a plurality of connecting lines between bit switches and upper-level configuration units so as to establish a redundant configuration.
08 Mar 1988
TL;DR: A nonblocking, self-routing copy network with constant latency is proposed, where the decision-making is based on a 2 bit header information, which yields minimum complexity of switch nodes.
Abstract: A nonblocking, self-routing copy network with constant latency is proposed. Packet replications are accomplished by two fundamental processes: encoding and decoding. The encoding process transforms the set of copy numbers, specified in the headers of incoming packets, into a set of monotone address intervals that form new packet headers. This process is carried out by a running adder network and a set of dummy address encoders. The decoding process performs the packet replication according to the Boolean interval splitting algorithm through the broadcast banyan network. The destinations of copies are determined by the trunk-number translators. At each stage of the broadcast banyan network, the decision-making is based on a 2 bit header information, which yields minimum complexity of switch nodes. >
Patent•
14 Oct 1988
TL;DR: In this article, an asynchronous time switch having a switching fabric made up of such elements (16) copes with the maximum delay requirements of voice class signals by priority of selection over other classes of signals.
Abstract: The switching element (16) comprises a plurality of selectors (32) each having an input for a tagged packet signal and a plurality of arbiters (34) each having an output for a transmitted packet signal. Between each selector (32) and each arbiter (34) is a signal path connection. Each arbiter (34) selects the first received packet signal and prohibits transmission from all other selectors by assertion of a busy signal until transmission of the first received packet signal is completed. An asynchronous time switch having a switching fabric made up of such elements (16) copes with the maximum delay requirements of voice class signals by priority of selection over other classes of signals. Increased throughput is attained by means of multiple switch fabric planes and by use of flooding. The latter technique involves sending copies of a packet signal along all possible paths to a desired output, all but one copy failing at arbiters (34) within the switch plane fabric or at a switch plane arbiter (24).
Patent•
18 Oct 1988
TL;DR: In this paper, an optical packet switching system is described in which a routing signal is composed of a wavelength-multiplexed optical signal and an information part and a packet end code are also composed of optical signals.
Abstract: An optical packet switching system is disclosed in which a routing signal is composed of a wavelength-multiplexed optical signal and an information part and a packet end code are also composed of optical signals. In accordance with the present invention, a switching network is formed by a multi-stage combination of light triggering switches which are closed depending on the presence or absence of a particular wavelength in the wavelength-multiplexed optical signal.
TL;DR: The very-small-aperture-terminal (VSAT) fixed satellite communication network is a star network in which many dispersed micro terminals attempt to send data in a packet form through a random access/time-division multiple-access (RA/TDMA) satellite channel with transmission delay.
Abstract: The very-small-aperture-terminal (VSAT) fixed satellite communication network is a star network in which many dispersed micro terminals attempt to send data in a packet form through a random access/time-division multiple-access (RA/TDMA) satellite channel with transmission delay. The basic concept of the VSAT and its service potential are discussed. Two classes of traffic are addressed, namely business-oriented low-rate-data traffic and bulk data traffic of corporate networks. Satellite access, throughput, and delay are considered. The size of the network population that can be served in an RA/TDMA environment is calculated. User protocols are examined. A typical VSAT business scenario is described. >
Patent•
AT&T1
TL;DR: In this paper, the authors propose a method and apparatus for decreasing delay and use of data processing resources in the reliable transmission of data frames in a packet network, where a virtual link address is transmitted with each data frame which is translated into the mode of processing the frame at the data switching point, and into the virtual and real address of the next link.
Abstract: A method and apparatus for decreasing delay and use of data processing resources in the reliable transmission of data frames in a packet network. In transmitting data from a source to a destination over a plurality of intermediate data switching points, the data processing required for each frame is selectively varied at each data switching point, according to the requirements for transmission of data frames of a message and of the succeeding link used for that message. A virtual link address is transmitted with each data frame which is translated into the mode of processing the frame at the data switching point, and into the virtual and real address of the next data link. Advantageously, such an arrangement allows for minimizing the data processing load and delay at each protocol handler of the data path through the packet network.
TL;DR: A comprehensive model encompassing the process of packet duplication together with both forms of packet elimination is defined and a quasi-static distributed algorithm is developed that is optimal, deadlock free, and loop free.
Abstract: Packet duplication is discussed as a means of increasing network reliability in an environment where packet loss exists. Several methods of routing the duplicates are presented, one of which-the st-numbering-is shown to have the combined advantage of using disjoint paths and more even utilization of network resources. An additional mechanism, deliberate packet elimination, is introduced as a means of controlling congestion that may result, in part, from the duplication. A comprehensive model is defined encompassing the process of packet duplication together with both forms of packet elimination. Within this model, a cost function based on average packet delay is defined. A quasi-static distributed algorithm is developed that is optimal, deadlock free, and loop free. Extension of the model to include packet retransmission is considered. >
Patent•
21 Apr 1988TL;DR: In this article, a simulation method for a distributed processing system characterized by defining transmission delay times ascribable to the transmission medium, input/output data items and processing times of respective programs which are set in the system, and numbers of the processors in which the programs are stored is presented.
Abstract: In a distributed processing system wherein a plurality of processors are connected by a transmission medium; a simulation method for a distributed processing system characterized by defining transmission delay times ascribable to the transmission medium, input/output data items and processing times of respective programs which are set in the system, and numbers of the processors in which the programs are stored.
TL;DR: An analysis is presented of the delay performance of the n-ary stack algorithm, an easy-to-implement random-access algorithm that uses collision-no-collision binary feedback and requires only limited feedback sensing by the users.
Abstract: An analysis is presented of the delay performance of the n-ary stack algorithm, an easy-to-implement random-access algorithm that uses collision-no-collision binary feedback and requires only limited feedback sensing by the users. Utilizing the regenerative character of the stochastic processes that are associated with the random-access system, tight upper and lower bounds on the mean packet delay and on the packet delay variance are derived. It is shown that the algorithm with n=3 has the best delay characteristics. Simulation results for the percentiles of the packet delay distribution are given. >
27 Mar 1988
TL;DR: Based on the traffic assumption of periodic packet streams, the necessary and sufficient clock rate is determined in order for the switch to be nonblocking and has turned out to be quite different from analyses based on the assumption of random traffic.
Abstract: The following model of a packet switch is considered: at each clock tick, the switch attempts to route the head-of-line packet at the buffer of every input port to its destination port. Each output port can receive only one packet at a time, but there may be packets from multiple inputs destined for common output. The switch first selects exactly one packet for each requested output and then routes all selected packets through a self-route interconnection network such as the Batcher-Banyan network. Based on the traffic assumption of periodic packet streams, the necessary and sufficient clock rate is determined in order for the switch to be nonblocking. This result has turned out to be quite different from analyses based on the assumption of random traffic. >
[...]
TL;DR: A systematic review is provided of the various techniques that can be used to perform the actual packet-by-packet routing operation at the upper layer, called the packet forwarding function.
Abstract: A packet network is viewed as consisting of two major interacting layers: a lower layer responsible for the determination of a set of paths that can be used to carry packet flows, and an upper layer responsible for actually sending the flows over these paths, on a per-packet basis. A systematic review is provided of the various techniques that can be used to perform the actual packet-by-packet routing operation at the upper layer, called the packet forwarding function. The function components of a routing system and its characteristics (responsiveness to changes in network state and degree of centralization) are discussed. Five routing techniques are then examined, namely source, directory, destination, global-path, and channel-link-path routing. >
Patent•
10 Jun 1988
TL;DR: In this article, a data transmission network is disclosed which includes a plurality of nodes each adapted to send a packet of data, and a controller or hub is connected to each of the nodes for immediately relaying a packet from one node to a desired destination when it is the only packet received by the controller.
Abstract: A data transmission network is disclosed which includes a plurality of nodes each adapted to send a packet of data. A controller, or hub, is connected to each of the plurality of nodes for immediately relaying a packet from one of the nodes to a desired destination when it is the only packet received by the controller means. However, when a plurality of packets are simultaneously received by the controller from plural nodes, the controller immediately relays a selected packet, and temporarily stores the other packets for subsequent transmission.
TL;DR: The author describes the options and parameters which have been selected for a Belgian experiment planned in the early 1990s, including fixed or variable packet length, the optimal packetlength, transmission and switching speed, and the number of lower-layer capabilities.
Abstract: The definition of a system requires the selection of a number of basic options. PTM (packet transfer mode) is a generic concept grouping a number of similar techniques which enable very flexible switching and transmission. The author describes the options and parameters which have been selected for a Belgian experiment planned in the early 1990s. Discussed are the following aspects: ATD (asynchronous time division) versus FPS (fast packet switching), including fixed or variable packet length, the optimal packet length, transmission and switching speed, and the number of lower-layer capabilities. >
08 Mar 1988
TL;DR: A description is given of a broadband packet network architecture suitable for evolving the existing public switching network into an all-fiber broadband network for integrated voice, data, and video applications.
Abstract: A description is given of a broadband packet network architecture suitable for evolving the existing public switching network into an all-fiber broadband network for integrated voice, data, and video applications. The architecture takes into account the needs for bit-rate flexibility, robustness to service evolution, and interoperability with the existing circuit-switched public network. Key features of the network include internally nonblocking broadband packet switches, integrated network transport, and simplified network-routing algorithms. The feasibility and the benefits of a broadband public network using packet technologies are shown. >