Showing papers on "Voltage droop published in 1993"

Expandable multiterminal DC systems based on voltage droop

Abstract: This paper introduces a decentralized control scheme for the parallel connection of multiple rectifiers feeding a DC network with numerous inverters. The coordination of multiple HVDC power systems without explicit communication is accomplished by the use of DC-side voltages as a "droop" mechanism. The DC side voltage serves the role of frequency in an ordinary AC system. The approach is most suitable to superconducting DC systems and to DC systems that span small distances and where voltage is relatively uniform throughout the DC system. This paper presents the concept in the context of a high capacity superconducting 10 kV urban infeed. >

Voltage converting circuit and multiphase clock generating circuit used for driving the same

Abstract: A voltage converting circuit of the charge pump step-up type includes a first circuit means for charging each of first and second capacitors with the voltage of a voltage source at a first timing. A second circuit operates to serially connect the charged first capacitor between a positive electrode of the voltage source and a positive voltage output terminal at a second timing so that a positive voltage which is a double of the voltage source voltage, is supplied from positive voltage output terminal. A third circuit operates to the charged first and second capacitors in series between a ground terminal and a negative voltage output terminal at a third timing so that a negative voltage which is a double of the voltage source voltage, is supplied from the negative voltage output terminal. Since the positive voltage and the negative voltage are generated independently of each other, a voltage variation on one of the positive and negative voltage output terminals caused by an external load causes no voltage variation on the other of the positive and negative voltage output terminals.

A method for calculation of margins to voltage instability applied on the Norwegian system for maintaining required security level

Abstract: The authors describe a method for calculating margins to voltage instability. The method is based on sensitivity techniques. The measure of voltage instability can be given in terms of MW, MVAr or MVA depending on the components in the increase in load. The extensions to earlier publications of the method are the ability to increase the load and generation simultaneously on several buses without increasing the computation time. A single forward and backward substitution is sufficient to find the required sensitivities when the load is increased. The production of the plant can be increased either by a specified profile or by using the turbine droop characteristics. A method for identification of contingencies needing an explicit reserve evaluation is briefly described. >

Bandgap voltage reference generator.

Abstract: A bandgap voltage generator using a simple bandgap voltage reference supply circuit which has virtually no power supply rejection ratio (PSRR) which can produce an output bandgap voltage, V BG , using an extremely low power supply voltage, V DD . In order to increase the PSRR, a signal generated by the bandgap voltage reference supply circuit is amplified by a high gain amplifier circuit comprised of two cascode connected FETs. The highly amplified signal generated by the high gain amplifier circuit drives a voltage regulator, comprised of an FET used as a voltage controlled current sink, which regulates the voltage supplied from the power supply, V DD , to the bandgap voltage reference supply circuit. This combination of a bandgap voltage reference with virtually no PSRR and a high gain amplifier results in a bandgap voltage generator with a very high PSRR.

Low-to-high voltage translator with latch-up immunity

Abstract: A fast low-to-high voltage translator with immunity to latch-up. The circuit includes a voltage comparator and employs at least one transistor which is used to quickly pull up a node. If further uses another transistor which is capable of limiting the voltage at certain nodes in order to eliminate latch-up if a pumped power supply is provided to the circuit. Latch-up therefore is eliminated during power-up. Other transistors are utilized as voltage drop limiters to limit the voltage drop across other transistors during switching. This provides improved reliability by reducing substrate current and hot carriers.

Substrate bias generating circuit

Abstract: A substrate bias generating circuit (20) provides a substrate bias voltage to a substrate (50) of an integrated circuit. A voltage-to-current converter circuit (22) provides a constant current proportional to a bandgap generated reference voltage. P-channel transistors (34 and 35) then provide constant current sources for a voltage level sensing circuit (36) based on the bandgap generated reference voltage. The voltage level sensing circuit (36) monitors the level of the substrate bias voltage, and when the substrate bias voltage reaches a predetermined voltage level, provides a first control signal for activating an oscillator (47). A level converter (43) is provided to amplify, or level convert the first control signal for more reliable control of the oscillator. A substrate bias generating circuit (20) provides a precisely controlled substrate bias voltage to the substrate (50) that is independent of process, temperature, and power supply variations.

Voltage compensating delay element

Abstract: A signal-delaying capacitive circuit applied to a node in a microcircuit device is immunized against the variation of the supply voltage by a metal-oxide semiconductor connected in series between the node and the signal-delaying capacitive circuit. The gate of tile semiconductor is biased with a voltage signal proportional to the supply voltage, whereby the resistance of the semiconductor is increased as the supply voltage decreases; thus, isolating the capacitive circuit from the node and reducing the delay.

Non-volatile semiconductor memory device with high voltage generator

Abstract: Disclosed is a semiconductor integrated circuit device, which comprises a booster circuit for boosting a source voltage, a voltage limiter having one end connected to the output terminal of the booster circuit, for limiting the output voltage of the booster circuit to a given value, and a voltage setting circuit, connected to the other end of the voltage limiter, for arbitrarily adjusting a voltage at the other end of the voltage limiter. This design can keep the output voltage of the booster circuit at a constant level and can set that output voltage to an arbitrary voltage.

CMOS driver which uses a higher voltage to compensate for threshold loss of the pull-up NFET

Abstract: The low-power two-stage data output buffer (20,70) includes a two-stage switching circuit (50, 72) that drives an n-channel pull-up transistor (24) in two stages, thus only using current from the pumped high voltage supply during the second stage of the operation. The two-stage switching circuit (50, 72) first drives the pull-up transistor (24) with the supply voltage, VDD, then drives it with the pumped high voltage supply, VPP. A feedback circuit, coupled between the output node (28) and the two-stage switching circuit (50, 72), generates a path from the high voltage supply, VPP, to the n-channel pull-up transistor (24) in response to the supply voltage level appearing on the output node (28), and blocks the path from the high voltage supply, VPP, to the supply voltage.

Inverter current load detection and disable circuit

Abstract: A circuit and method for protecting a voltage inverter circuit is disclosed. The circuit comprises a first comparison circuit capable of comparing a first reference voltage to a voltage indicative of the load current of the voltage inverter. When the comparison circuit signals that the first reference voltage is greater than the load voltage, a disable circuit coupled to the first comparison circuit disables the voltage inverter. In the preferred embodiment, the inverter provides power to a cold cathode fluorescent lamp which, if damaged, can harm the inverter.

Low-battery state detecting system and method for detecting the residual capacity of a battery from the variation in battery voltage

Abstract: There is provided a low-battery detection reference voltage table for memorizing the correspondence between current values and low-battery detection reference voltage values, which is obtained from battery voltage characteristic curves corresponding to different current values. Further, there is provided a low-battery reference voltage correction table for correcting the low-battery detection reference voltage in accordance with a voltage variation. Referring to the low-battery detection reference voltage table on the basis of the value of current output from the battery, the low-battery detection reference voltage corresponding to the current value is obtained. The voltage variation is found from the currently measured battery voltage and the previously measured battery voltage which is memorized. On the basis of the voltage variation, the correction voltage is found with reference to the low-battery reference voltage correction table. The found correction voltage is added to the low-battery reference voltage, thereby correcting the low-battery reference voltage. When the measured battery voltage is lower than the corrected low-battery detection reference voltage, the low-battery stated is determined.

Voltage supply circuit and semiconductor device including such circuit

Abstract: The level shifter circuit of an internal down converter includes a P channel MOS transistor constituting a resistance component, and a resistor constituting a resistance component. The temperature coefficient of resistance component is set larger than the temperature coefficient of resistance component so that the output voltage of level shifter circuit has a negative temperature characteristic. If a reference voltage generated by reference voltage generation circuit decreases when operating at a high temperature, the output voltage of level shifter circuit decreases as well. Thus, change in an internal voltage due to change in the operation temperature can be compensated.

Uninterruptible power supply (UPS) and method

Abstract: A UPS having a ferroresonant transformer is selectively switched from AC line voltage to an inverter by a control method and apparatus using fuzzy logic to select an optimum switching point. The control apparatus and method senses output load current, output voltage and input voltage. Output current is used to calculate output load as a percentage of full load. First membership functions relating to percent load, second membership functions relating to output voltage, third membership functions relating to input voltage switching points, and rules using percent load membership and output voltage membership as antecedents and values of input voltage switching points as consquents as determined by regulation characteristics of the ferroresonant transformer, are used to execute a fuzzy inference and generate dynamic input voltage switching points for comparison with line input voltage to control switching of the UPS between line and inverter sources.

Burn-in test circuit for semiconductor memory device

Abstract: For enabling burn-in test in a memory device such that a test mode timing signal and detected voltage level of an external power supply are combined in order to maintain compatibility with conventional timing signals, and for preventing the burn-in test circuit from dissipating power in a standby state, there is provided a sense control circuit for producing a short duration enable pulse in response to an input level of timing signals such as WCBR, CBR, or ROR, and a voltage sensor for sensing the input voltage level of the external power supply voltage during the short duration pulse. Also, the circuit includes a burn-in sensor which generates a signal output which determines set or reset of the burn-in test mode in response to the timing signals and the detected level of the voltage sensor. Since the voltage sensor is operated only when the short duration pulse is applied, the power consumption in the voltage sensor is negligible even during the sensing operation of the external supply voltage. Further, the burn-in test mode is activated in the memory device if the external input signals satisfy the particular condition and the level of the external supply voltage is higher than the preset burn-in test voltage, thereby the memory device is prevented from entering into the burn-in test mode due to noise of the external power supply voltage.

Analysis and Design of a Charge Pump Circuit for High Output Current Applications

Abstract: A charge pump circuit has been developed that can deliver high currents even for a system supply voltage of 3 V. The circuit consists of capacitances, connected by MOS switches. The influence of the on-resistance of the switches on the circuit's output resistance has been analysed. The switches are implemented by PMOS transistors. The source bulk potential of these transistors is kept constant to prevent an increase in threshold voltage of the transistors. The maximum output voltage is determined by the breakdown voltage of the switches and not by the MOST's threshold voltage. The circuit has been realised and measurement results match with the calculated values.

Adaptive threshold circuit

Abstract: An adaptive threshold circuit for use with a magnetic type of sensor that has a pick-up coil. The pick-up coil has an alternating voltage induced therein when a slot formed in a wheel rotates past the sensor. The circuit produces a square wave pulse voltage during positive half-cycles of the voltage generated in the pick-up coil. The circuit includes a digital to analog converter the input of which is connected to a pulse counter. The output of the converter is a function of the count magnitude in the counter and provides a variable threshold voltage that is compared by a voltage comparator with a voltage that is a function of the magnitude of the voltage generated in the pick-up coil. The circuit has an input circuit connected to the pick-up coil that includes a voltage attenuating circuit and a diode. The pulse count of the counter is, at times, incremented under control of a comparator that compares the output voltage of the converter with a voltage that is a function of the magnitude of the voltage generated in the pick-up coil.

CMOS voltage reference circuit

Abstract: A simple CMOS voltage reference circuit develops a reference voltage from the sum of the threshold voltages of a pair of complementary devices. In a p-type substrate a p-channel device is formed in an isolated n-type well, with the well tied to the source at the reference node. The drain is coupled to the drain of a complementary n-channel device. An additional p-channel device functions as a current source. The voltage reference circuit may be advantageously cascaded to improve stability and insensitivity to the power supply voltage.

Tunnel diode shift register utilizing tunnel diode coupling

Abstract: A shift register having a first bistable latching circuit operable for switching between a low voltage state and a high voltage state in response to receiving an input current and a first clock voltage pulse. A second bistable latching circuit operable for switching from said low voltage state to the high voltage state in response to receiving a switching current induced from the first bistable latching circuit and a second clock voltage pulse. A clock voltage pulse source operable for successively providing clock voltage pulses in phase sequence to the first and second bistable latching circuits. A coupling circuit coupled between the first and second bistable latching circuits and having electrical characteristics such that the coupling circuit generates the switching current for a predetermined voltage drop across the coupling circuit in response to the first bistable latching circuit being in the high voltage state, the coupling circuit generating currents of lesser value than the switching current for voltage drops which are lesser or greater than the predetermined voltage drop.

Power supply controller having low startup current

Abstract: A power supply controller includes a comparator for providing a regulated voltage when an input voltage exceeds a reference voltage, so that a reference voltage is provided to drive a load discharge circuit. When the input voltage is less than the reference voltage, such as during a startup or sleep mode of operation of the controller, the load discharge circuit is driven by an output pulldown circuit so as to maintain minimum functions within the integrated circuit of the controller including turnoff of an external MOSFET. The output pulldown circuit senses the resulting absence of the regulated voltage using a first transistor coupled to be biased into nonconduction when the regulated voltage is not provided. This biases a second transistor into conduction to maintain a transistor within the load discharge circuit conductive. In this manner, the output powers its own operation, including the pulldown thereof. The controller enables a relatively small startup current to be used, utilizes multiple outputs, and eliminates temperature dependence of the startup current.

Current monitoring circuit having controlled sensitivity to temperature and supply voltage

Abstract: An integrated circuit including a comparator having two output states and being responsive to a voltage developed across a shunt in the circuit so that the comparator assumes one of its two output states when the voltage developed across the shunt is greater than a threshold switching voltage and the other of its two output states when the voltage developed across the shunt is less than the threshold switching voltage. The integrated circuit additionally includes a threshold switching voltage sensitivity control circuit, coupled to and controlling the comparator, for controlling a sensitivity of the threshold switching voltage to changes in a supply voltage of the lamp circuit and for controlling a sensitivity of the threshold switching voltage to changes in temperature of the integrated circuit.

Intermediate voltage generating circuit having low output impedance

Abstract: By reducing output impedance of an intermediate voltage generating circuit used in a DRAM and the like, an output voltage quickly recovers to an intermediate voltage even in the case where the output voltage fluctuates heavily. The intermediate voltage generating circuit includes a first reference voltage generating circuit, a second reference voltage generating circuit, a first intermediate voltage output stage, and a second intermediate voltage output stage. An MOS transistor configuring a current mirror is provided with the first and second intermediate voltage output stages. The size of the MOS transistor of the second intermediate voltage output stage is larger than that of a transistor of the first intermediate voltage output stage. As a result, in response to a current flowing in either transistor of the first intermediate voltage output stage, a current having a value equal to or more than that of the current flowing in either transistor of the first intermediate voltage output stage is supplied to an output node, whereby the output impedance is reduced.

Low power voltage boost circuit with regulated output

Abstract: A voltage boost circuit is provided for amplifying or boosting an input voltage to a higher voltage level while also providing a regulated voltage amount for the boosted output. The voltage boost circuit with regulated output is well suited for low power applications by providing an oscillator which can be switched between normal mode and standby mode of operation depending upon the voltage state of the amplified output. Once the voltage state is at or within a regulated range, the oscillator can be placed in a standby state and the power consumption normally associated with amplifier or oscillator operation is considerably reduced. A voltage multiplier ensures that the output voltage is maintained over a fairly long period of time without requiring active refresh and power consumption normally associated therewith.

Adaptive boost switching preregulator and method having variable output voltage responsive to input voltage

Abstract: A boost switching preregulator includes a boost switching power conversion device which converts power from a source of essentially DC unipolar input voltage for delivery as an essentially DC unipolar output voltage to a load. The preregulator also includes a control device which accepts an input indicative of the magnitude of the output voltage and which, in response to variations in the magnitude of the input voltage, controls the boost switching power conversion device such that the magnitude of the output voltage varies within a range. Within this range, the unipolar output voltage is greater than or equal to the magnitude of the unipolar input voltage, and the span of the range is at least ten percent of the maximum value of the unipolar output voltage.

Voltage threshold detection circuit with very low power consumption

Abstract: A supply-voltage-monitoring circuit, for low-power integrated circuits, in which charge-sharing through a switched-capacitor chain is used to couple the supply voltage to a dynamic sensing node. The dynamic sensing node drives a half-latch, which is stable in a no-alarm condition. In this circuit, the state of the output gets switched over in the first phase if the voltage at the terminals of the capacitor at the start of this stage (this voltage being equal to a fraction of the input voltage) crosses a determined threshold. This threshold is determined as a function of technical parameters for the construction of the circuit. These technical parameters are chiefly the threshold voltage of the transistor and the characteristics of the transistors that form the locking circuit.

Voltage stability as affected by static load characteristics

Abstract: Voltage stability is analysed as a dynamic phenomenon associated with the excitation field dynamics of synchronous machines. It is shown that, for constant impedance loads, a single machine powersystem is voltage stable for all reasonable operating conditions. For constant power loads, however, a simple system has a voltage controllability limit that can be close to nominal voltage. The voltage stability region as a function of real and reactive load dependence on voltage is calculated for a single machine system with and without automatic voltage regulation. The analysis is then extended to the multimachine case, for which approximate voltage stability criteria are developed using the extended linearisation coefficient matrices. The linearised model analysis is found to be absolutely consistent with the results obtained by nonlinear simulation of a multimachine power system.< >

Control device for controlling a central processing unit on instantaneous voltage drop

Abstract: In a control device for controlling a CPU 11 in accordance with an input voltage which is applied to the CPU and which results from a power source voltage, a first detecting circuit 16 produces a first detection signal when the power source voltage is lower than a first voltage. Responsive to the first detection signal, a switching circuit 21 stops supply of the input voltage to the CPU. The CPU becomes to a waiting state. A condenser 15 discharges an electric voltage in order to compensate a drop of the input voltage. When the input voltage is lower than a second voltage which is lower than the first voltage, a second detecting circuit 17 produces a second detection signal to make the CPU become to a reset or an initial state.

Transformerless low voltage switching power supply

Abstract: A power supply system employs a control circuit to regulate the voltage across a load capacitor by monitoring the capacitor voltage by means of a differential voltage sensor and by monitoring the drain-source voltage of a switching power FET connected in series with the load capacitor across input terminals that supply a full wave rectified voltage derived from a commercial AC supply voltage. The control circuit controls the switching action of the power FET in a manner such that the load capacitor is charged at least once during each cycle of the rectified voltage (unfiltered). This method of voltage regulation by monitoring the load capacitor voltage and the FET voltage (V ds ) provides significant advantages over other forms of voltage regulation.

Substrate voltage generator and method therefor in a semiconductor device having selectively activated internal stepped-down power supply voltages

Abstract: A semiconductor device having an internal voltage down converter includes a circuit operating with an externally applied power supply voltage, a circuit operating with an external stepped-down voltage as an operation power supply voltage, and substrate voltage generators for generating a substrate potential, or a substrate bias voltage according to a state of the internal stepped-down voltage. The first substrate voltage generator includes a first generating circuit operating with the externally applied power supply voltage, a second generating circuit operating with the internal stepped-down voltage, and a circuit for operating the first generating circuit in a period from turn-on of the external power supply until the internal stepped-down voltage becomes stable, and for operating the second generating circuit thereafter. The second substrate voltage generator includes first and second generating circuits, and a circuit responsive to the substrate voltage for selectively activating the first and second generating circuits. Those constructions make it possible to stably apply a substrate voltage corresponding to an operation voltage to the substrate region.

Drive circuit for a power MOSFET with load at the source side

Abstract: Power FETs having a load at the source side require a gate voltage lying above the drain voltage in order to be driven completely conductive. This can occur with a known pump circuit. In the drive circuit disclosed, the diode connected to the gate terminal of the power FET is a depletion FET whose substrate terminal is applied to the oscillating voltage that is required for the operation of the pump circuit. The cut off voltage is thus synchronously set relative to the oscillating voltage such that low losses arise when loading CGS and an adequately high inhibit voltage can be built up when loading the pump capacitor.

Semiconductor memory device including a component having improved breakdown voltage characteristics

Abstract: In a semiconductor memory device including a boosting circuit for generating a high voltage constantly, and a word line driving circuit for transmitting a high voltage from the boosting circuit on a selected word line, a capacitor for stabilizing the high voltage generated by the boosting circuit is formed of a series of capacitive elements using a FET having a gate insulating film identical in thickness to that of a insulating gate type field effect transistor in the memory device. A voltage applied across each capacitive element is relaxed, and the capacitor is improved in dielectric breakdown voltage characteristics, to stably supply the high voltage.