Showing papers on "Voltage droop published in 2000"

Dynamic voltage restoration with minimum energy injection

Abstract: Summary form only given, as follows. Voltage sags are one of the most important power quality problems challenging the utility industry. Voltage sags can be compensated for by voltage and power injection into the distribution system. By injecting voltage with a phase advance with respect to the sustained source-side voltage, reactive power can be utilized to help voltage restoration. Hence, the consumption of real power, from the perspective of the energy supply device, can be reduced. This energy-saving voltage injection comes at the expense of an increased voltage injection magnitude, load power swing phase shift and discontinuity of voltage wave-shape. For this reason, several proposed compensation strategies are examined, in term of satisfying custom power while taking into consideration the capacity of the energy-storage device and the voltage injection constraint of the dynamic voltage restorer. Numerical examples are included to illustrate the efficacy of the proposed control strategies.

Voltage regulator compensation circuit and method

Abstract: A method and circuit enable a voltage regulator to employ the smallest possible output capacitor that allows the regulator's output voltage to be maintained within specified boundaries for large bidirectional step changes in load current. This is achieved with a technique referred to as “optimal voltage positioning”, which keeps the output voltage within the specified boundaries while employing an output capacitor which has a combination of the largest possible equivalent series resistance (ESR) and lowest possible capacitance that ensures that the peak voltage deviation for a step change in load current is no greater than the maximum allowed. The invention can be used with regulators subject to design requirements that specify a minimum time T min between load transients, and with those for which no T min is specified. When no T min is specified, optimal voltage positioning is achieved by compensating the regulator to ensure a response that is flat after the occurrence of the peak deviation, which enables the output voltage to remain within specified limits regardless of how quickly load transients occur. Another embodiment enables the power consumption of the device being powered by the regulator to be reduced under certain circumstances, while still employing the smallest possible output capacitor that allows the regulator's output voltage to be maintained within specified boundaries. The invention is applicable to both switching and linear voltage regulators.

Analysis, design, and performance evaluation of droop current-sharing method

Abstract: The droop current sharing method is analyzed, and a general design procedure is proposed. It is shown that the current-sharing accuracy of N+1 power supplies is a function of the output-voltage set-point accuracy, the slope of the output-voltage droop, and gains of the control loop. It was found that to achieve a current sharing accuracy of 10% the output voltage of the paralleled power supplies needs to be set within 0.35%. The accuracy of the design procedure was compared against measured results of three power supplies operating in parallel.

On the Use of Microarchitecture-Driven Dynamic Voltage Scaling

Abstract: This paper proposes microarchitecture-driven dynamic voltage scaling as a viable solution to power efficient architectures, with little or no performance penalty. The run-time behavior exhibited by common applications, with active periods, alternated with stall periods due to cache misses, is exploited to reduce the dynamic component of power consumption via selective voltage scaling. As it is shown by experimental results, up to 20% reduction in total energy consumption, 22% in average power and 14% in peak power have been achieved with less than 6% penalty in performance. The study shows that microarchitecture-driven dynamic voltage scaling can become an effective tool for energy reduction in high-performance processors.

Method and apparatus for flash voltage detection and lockout

Abstract: A method for voltage detection and lockout. The method of one embodiment first compares a reference voltage to a supply voltage to determine whether the voltage supply voltage is greater than the reference voltage. The reference voltage is validated by determining whether the reference voltage is at least a valid voltage potential. An unlock signal is generated if the supply voltage is greater than the reference voltage and if the reference voltage is valid.

Parallel operation of three-phase UPS inverters by wireless load sharing control

Abstract: A load sharing control based on the frequency and voltage droop concept for parallel operation of two three-phase uninterruptible power supply (UPS) systems with no control interconnection lines is presented in this paper. First of all, due to the use of active power and reactive power as control variables, the characteristics of output powers according to amplitude and phase differences between output voltages of two UPS systems are analyzed. Secondly, simulation results with different line impedance are demonstrated the feasibility of the wireless load sharing control. Finally, experiments are presented to verify the theoretical discussion with two three-phase 20 kVA UPS systems employed TMS320C32, a kind of real time digital signal processor (DSP).

Bidirectional energy management system independent of voltage and polarity

Abstract: An energy management system for a motor vehicle has a first voltage supply terminal having a first nominal voltage and a second voltage supply terminal having a second nominal voltage. At least one of the first and second voltage supply terminals has a battery. A universal bi-directional DC-DC converter is coupled to exchange energy between the first and second voltage supply terminals. A third voltage supply terminal is provided for exchanging energy between the DC-DC converter and an external vehicle electrical system or battery charger. The energy exchanged between the first or second voltage supply terminals and the third voltage supply terminal is independent of the voltage and polarity of the external vehicle electrical system or battery charger.

Voltage control circuitry for charging output capacitor

Abstract: Battery driven voltage control circuitry charges an output capacitor, which periodically supplies a current pulse. The circuitry converts battery voltage VBAT to a charging voltage VUPC based upon programmed parameters and the voltage VCOMPL at the capacitor. The circuitry includes a voltage converter for multiplying VBAT to produce VUPC. VCOMPL is sampled to determine its “droop” at the end of an output current pulse. If the droop is lower than a threshold, then the voltage converter increases the charging voltage. If the droop is above a threshold, then the voltage converter reduces the charging voltage. This feedback maintains the output voltage within an acceptable operating range to produce an efficacious output current pulse for stimulation without causing unproductive energy loss. In order to avoid premature depletion of battery energy, VUPC is compared with VCOMPL to determine the optimum clock rate to be used to convert VBAT to VUPC.

Driving apparatus and method for a plasma display panel

Abstract: A driving apparatus comprises switches SW1 to Sw3, a first signal line OUTA, and a second signal line OUTB. By ON/OFF control of the switches SW1 to Sw3, the voltage of the first signal line OUTA is changed between a positive voltage (+1/2V) level, which is smaller than a voltage V to be applied to a load 20, and the ground level, and the voltage of the second signal line OUTB is changed between the ground level and a negative voltage (-1/2V). By ON/OFF control of switches SW4 and SW5, the positive and negative voltages given by the first and second signal lines are selectively applied to the load 20. The maximum voltage applied to each element in the driving apparatus can be thereby lowered to the voltage (1/2V), which is smaller than the voltage V to be applied to the load 20. This makes it possible to hold down the breakdown voltage of each element to half the value in previously-considered apparatus.

Self-refresh on-chip voltage generator

Abstract: A voltage control system and methodology for maintaining internally generated voltage levels in a semiconductor chip. The method comprises the steps of intermittently sampling an internal voltage supply level during a low power or “sleep” mode of operation; comparing the internal voltage supply level against a predetermined voltage reference level; and, activating a voltage supply generator for increasing the internal voltage supply level when the internal voltage supply level falls below the predetermined voltage reference level. The voltage supply generator is subsequently deactivated when the voltage supply level is restored to the predetermined voltage reference level. The sampling cycle may be appropriately tailored according to chip condition, chip temperature, and chip size. In one embodiment, the voltage control system and methodology is implemented in DRAM circuits during a refresh operation. The voltage levels that are suitable for sampling including DRAM band-gap reference voltage, boost wordline line voltage, wordline low voltage, bitline high voltage and bitline equalization voltages.

Dynamic voltage restorer with battery energy storage for voltage dip mitigation

Abstract: The important systems issues surrounding the circuit of a dynamic voltage restorer using battery energy storage for voltage dip mitigation are discussed by the authors. The connection arrangement, filtering, system control and effect of real power storage are examined. Simulation results for single and two-phase voltage sags indicate that the system responds quickly to changes in voltage phase and magnitude with only small system transients.

Battery cell by-pass circuit

Abstract: The invention is a circuit and method of limiting the charging current voltage from a power supply net work applied to an individual cell of a plurality of cells making up a battery being charged in series. It is particularly designed for use with batteries that can be damaged by overcharging, such as Lithium-ion type batteries. In detail, the method includes the following steps: 1) sensing the actual voltage level of the individual cell; 2) comparing the actual voltage level of the individual cell with a reference value and providing an error signal representative thereof; and 3) by-passing the charging current around individual cell necessary to keep the individual cell voltage level generally equal to a specific voltage level while continuing to charge the remaining cells. Preferably this is accomplished by by-passing the charging current around the individual cell if said actual voltage level is above the specific voltage level and allowing the charging current to the individual cell if the actual voltage level is equal or less than the specific voltage level. In the step of bypassing the charging current, the by-passed current is transferred at a proper voltage level to the power supply. The by-pass circuit a voltage comparison circuit is used to compare the actual voltage level of the individual cell with a reference value and to provide an error signal representative thereof. A third circuit, designed to be responsive to the error signal, is provided for maintaining the individual cell voltage level generally equal to the specific voltage level. Circuitry is provided in the third circuit for bypassing charging current around the individual cell if the actual voltage level is above the specific voltage level and transfers the excess charging current to the power supply net work. The circuitry also allows charging of the individual cell if the actual voltage level is equal or less than the specific voltage level.

Line drop compensation, high side voltage control, secondary voltage control-why not control a generator like a static VAr compensator?

Abstract: Generators typically regulate terminal voltage via automatic voltage regulator and exciter equipment. The desired high side (transmission side) voltage schedule is usually maintained by the power plant operator or by slow SCADA-type process control computers. Power system dynamic performance, however, can be improved by faster regulation of the transmission voltage. Contrasted to generators, static VAr compensators are designed specifically for transmission voltage regulation. The transmission voltage is directly regulated at high speed. Total SVC and medium voltage component reactive power ratings are referred to the transmission side. All medium voltage equipment are designed to support the transmission side reactive power and voltage regulation requirements. The droop (slope) setting is usually small compared to generators regulating terminal voltage. This paper introduces the panel session on secondary voltage control. The author outline various methods for tighter high side voltage control, with emphasis on control of hydro generation in the US Pacific Northwest.

Margining processor power supply

Abstract: A system and method for biasing supply voltage requirements that are input to a voltage regulator to facilitate testing a computer system with supply voltages above and below specified operating values. The present invention may also be used to compensate a voltage regulator that is not outputting the supply voltage required by the computer system. The system includes a processor voltage signal indicative of supply voltage required by one or more components in a computer system during operation, at least one other voltage signal indicative of margined or biased supply voltage for the computer system, and a selection control signal for selecting between the processor voltage signal and the at least one other voltage signal. The processor voltage signal, the at least one other voltage signal, and the selection control signal, are input to a multiplexer. The multiplexer outputs a voltage identification signal to the voltage regulator based on the processor voltage signal, the at least one other voltage signal, and the selection control signal.

Voltage detecting circuit for a power system

Abstract: A voltage detecting circuit for detecting a state of a first voltage includes a detection voltage generating circuit for generating a detection voltage depending on the first voltage, a reference voltage generating circuit for generating a reference voltage, a comparison circuit for comparing the detection voltage with the reference voltage and outputting a result of the comparison as a detection signal, and a control circuit for controlling at least one of the detection voltage generating circuit, the reference voltage generating circuit, and the comparison circuit so that at least one of these circuits operates intermittently.

Low supply voltage sub-bandgap reference circuit

Abstract: A sub-bandgap reference circuit yielding a reference voltage smaller than the bandgap voltage of silicon. The circuit generates a negative temperature coefficient signal Vbe and an oppositely tracking (positive temperature coefficient) ΔVbe, and takes the average of two signals related to ΔVbe-Vbe to yield a temperature-compensated voltage of one-half the bandgap voltage of silicon. The circuit features an unequal area current mirror feeding the diodes and resistors used to generate the ΔVbe-Vbe signals using low supply voltages (less than 1.5 volts). A standard CMOS implementation provides low power consumption at a supply voltage of only 1 volt with a good temperature coefficient. The averaging circuit may be implemented by a continuous time divider or by using switched capacitor techniques. The loop amplifier used in the ΔVbe-Vbe circuitry operates with low headroom in part due to a n-well biasing scheme that lowers the effective threshold voltage of the p-channel FETs used in the loop amplifier.

Modeling and Control of Parallel Three-Phase PWM Converters

Abstract: This dissertation studies modeling and control issues of parallel three-phase pulsewidth modulated (PWM) converters. The converters include three-phase boost rectifiers, voltage source inverters, buck rectifiers and current source inverters. The averaging of the parallel converters is performed based on a generic functional switching unit, which is called a phase leg in boost rectifiers and voltage source inverters, and a rail arm in buck rectifiers and current source inverters. Based on phase-leg and railarm averaging, the developed models are not only equivalent to the conventional threephase converter models that are based on phase-to-phase averaging, but they also preserve common-mode information, which is critical in the analysis of the parallel converters. The models reveal such parallel dynamics as reactive power circulation and small-signal interaction. A unique feature of the parallel three-phase converters is a zero-sequence circulating current. This work proposes a novel zero-sequence control concept that uses variable zero-vectors in the space-vector modulation (SVM) of the converters. The control can be implemented within an individual converter and is independent from the other control loops for the converter. Therefore, it greatly facilitates the design and expansion of a parallel system. Proper operation of the parallel converters requires an explicit load-sharing mechanism. In order to have a modular design, a droop method is recommended. Traditionally, however, a droop method has to compromise between voltage regulation and load sharing. After parametric analysis, a novel droop method using a gain-

Voltage margin testing using an embedded programmable voltage source

Abstract: An apparatus and method for performing voltage margin testing in an integrated circuit device. The device is provided with an embedded voltage source having a voltage regulator which outputs a regulated analog voltage at a nominal magnitude, such as +3.3 volts. A voltage monitor provides an indication when the regulated analog voltage varies from the nominal magnitude by an output tolerance range determined as a first selected percentage of the nominal magnitude. An adjustment circuit applies a voltage regulator adjustment signal to the voltage regulator to adjust the regulated analog voltage by a second selected percentage of the nominal magnitude. The adjustment circuit further provides a voltage monitor adjustment signal to the voltage monitor to concurrently adjust the output tolerance range to a third selected percentage of the nominal magnitude different from the first selected percentage.

A novel ride-through system for adjustable speed drives using common-mode voltage

Abstract: This paper proposes a new ride-through system for adjustable-speed drives (ASDs) using common-mode voltage. In the proposed ride-through system, the common-mode voltage inherent in a pulsewidth-modulation boost rectifier-inverter system is used for charging the energy storage device at normal conditions of the source power. That is, controlling the common-mode voltage with a small reactor while driving motors can regulate charging current. Using simple additional circuits and the existing rectifier, at the whole range of voltage disturbances from balanced or unbalanced shallow voltage sag to full outage, ride-through is successively available with the proposed system. Various energy storage devices can be selected according to the applications and two kinds of charging topology-using inverter-side or rectifier-side common-mode voltage-are also available in the proposed system.

Voltage multiplier having an intermediate tap

Abstract: A power supply circuit for use in a LCD device includes a voltage multiplier which outputs a multiplied voltage VLCD 1 and a median voltage VLCD 2 . A plurality of voltage followers are grouped in two groups each operating on the multiplied voltage VLCD 1 or the median voltage VLCD 2 , thereby reducing power dissipation of the LCD device.

Minimizing power consumption during sleep modes by using minimum core voltage necessary to maintain system state

Abstract: A control circuit reduces voltage being supplied to an integrated circuit in a sleep mode in which context (e.g. CPU state) is maintained. Because the voltage required to maintain the integrated circuit state intact may be significantly less than the voltage at which the integrated circuit can functionally operate at a predetermined frequency, significant power savings can be achieved by reducing voltage while the clocks are stopped, thereby reducing leakage current and saving power.

Transient override circuit for a voltage regulator circuit

Abstract: A circuit for providing a regulated voltage to a load. The circuit includes a power converter coupled to the load and including at least one pulse-width modulated switching device, a control circuit for providing a pulse-width modulated control signal to the pulse-width modulated switching device of the power converter based on an output voltage of the power converter, and a transient override circuit responsive to a load voltage for biasing the pulse-width modulated switching device conductive during certain load voltage conditions.

Driving apparatus and method, plasma display apparatus, and power supply circuit for plasma display panel

Abstract: A driving apparatus comprises switches SW 1 to Sw 3 , a first signal line OUTA, and a second signal line OUTB. By ON/OFF control of the switches SW 1 to Sw 3 , the voltage of the first signal line OUTA is changed between a positive voltage (+1/2V) level, which is smaller than a voltage V to be applied to a load 20 , and the ground level, and the voltage of the second signal line OUTB is changed between the ground level and a negative voltage (−1/2V). By ON/OFF control of switches SW 4 and SW 5 , the positive and negative voltages given by the first and second signal lines are selectively applied to the load 20 . The maximum voltage applied to each element in the driving apparatus can be thereby lowered to the voltage (1/2V), which is smaller than the voltage V to be applied to the load 20 . This makes it possible to hold down the breakdown voltage of each element to half the conventional value.

Power back-up unit with low voltage disconnects that provide load shedding

Abstract: A power back-up unit is provided which includes a primary power source that is connected to a plurality of loads, including a critical load and a non-critical load. A secondary power source is also provided. A first low voltage disconnect is electrically connected to the secondary power source and the critical load. A second low voltage disconnect is electrically connected to the secondary power source and the non-critical load. In one embodiment, the second low voltage disconnect disconnects the non-critical load upon loss of the primary power source. In another embodiment, the second low voltage disconnect has a voltage threshold that is greater than the voltage threshold of the first low voltage disconnect such that the non-critical load is disconnected by the second low voltage disconnect prior to the critical load being disconnected by the first low voltage disconnect.

High efficiency switching controller

Abstract: A high efficiency switching controller for use in a switching power supply (SPS) includes a current control device coupled to a voltage source of the SPS and a switch connected between the current control device and an output voltage circuit of the SPS. An under voltage lockout regulator coupled to the output voltage circuit of the SPS and the switch controls the state of the switch based on a voltage of the output voltage circuit and a bias unit coupled to the under voltage lockout regulator provides current to circuitry within the switching controller based on the voltage of the output voltage circuit. A protector within the high efficiency switching controller provides a control signal to the pulse width modulator unit to control the gate drive signal in response to an operating condition of the switching controller. Additionally, the control signal can periodically enable the pulse width modulator unit in response to a voltage of the output voltage circuit so that the gate drive signal includes groups of gate drive pulses.

Circuit arrangement of a control device for monitoring a voltage

Abstract: Described is a circuit arrangement of a control device for monitoring a voltage with regard to voltage deviations above a specific voltage value, and for outputting a reset signal for interlocking of output elements that are controlled by the control device if a voltage deviation above the voltage value arises. The arrangement includes an arrangement for generating a reference voltage, a first comparator for comparing the reference voltage with a first comparison voltage value, which is derived from the voltage to be monitored multiplied by a first proportionality factor, and for outputting the reset signal, and a second comparator. To ensure that the circuit arrangement can monitor the voltage to be monitored with regard to whether it exceeds or is below two independent and freely definable comparison voltage values, it is proposed that the second comparator compare the reference voltage with a second comparison voltage value which is derived from the voltage to be monitored multiplied by a second proportionality factor, and it is proposed that the second comparator output the reset signal.

Influence of RMS variation measurement protocols on electrical system performance indices for voltage sags and swells

Abstract: This paper presents an evaluation study for measurement protocols of characteristic parameters related to short duration voltage variations (SDVs). The evaluation of possible differences in the magnitude and the duration of SDVs produced by different protocols is of great importance, for the electrical system performance indices related to voltage sags and swells are in practice obtained by measuring instruments. The study made use of a digital simulator that generated voltage conditions resultant of faults in a distribution network. Several measurement protocols for SDVs were applied and an overall comparison was performed.

Power supply circuit of an electro-optical device, driving circuit of an electro-optical device, method of driving an electro-optical device, electro-optical device, and electronic equipment

Abstract: A power supply circuit is provided for supplying a scanning line selection voltage to an electro-optical device. The electro-optical device includes pixels disposed at intersections between a plurality of scanning lines and a plurality of data lines, a voltage generation circuit for generating a selection voltage having a positive polarity (or a negative polarity) with respect to the center voltage of voltages applied to the data lines, a capacitor for storing the selection voltage, and an inverter circuit for inverting the polarity of the voltage stored in the capacitor with respect to the median voltage, and outputting the resultant voltage as a selection voltage having a negative polarity (or a positive polarity if the selection voltage has a negative polarity).

Power supply circuit for traffic signal lights utilizing LEDs

Abstract: A power supply circuit comprises a rectification section for rectifying AC voltage so as to obtain DC voltage, a voltage regulating circuit section for receiving the DC voltage and outputting a constant voltage, a light-emitting diode driven by the voltage output from the voltage regulating circuit section, and an output voltage detection section for detecting ambient temperature and the voltage output from the voltage regulating circuit section and outputting a voltage suitable for the light-emitting diode to operate at the detected ambient temperature. The voltage regulating circuit section compares the voltage output from the output voltage detection section with a reference voltage so as to obtain a control signal, inputs to a transformer current which is switched in accordance with the control signal, and supplies an output from the transformer to the light-emitting diode.

Crosstalk test unit and method of calibration

Abstract: A test unit for measuring crosstalk in twisted pair cable. The test unit has an output signal balance (OSB) circuit that compensates for parasitic capacitance at its output terminals. The OSB circuit has a voltage controlled capacitance connected in circuit with each output terminal to control the effective capacitance between the output terminals and ground. The bias voltage for the variable capacitances is calibrated by a method in which the voltage for one of the variable capacitors is held constant while the voltage for the other capacitor is varied in voltage levels. A test signal frequency sweep is applied to the test unit output terminals. First and second voltage values are obtained and a final bias voltage value is calculated from using these two values.