Since Stratton published his famous paper four decades ago, various transport models have been proposed which account for the average carrier energy or temperature in one way or another. The need for such transport models arose because the traditionally used drift-diffusion model cannot capture nonlocal effects which gained increasing importance in modern miniaturized semiconductor devices. In the derivation of these models from Boltzmann's transport equation, several assumptions have to be made in order to obtain a tractable equation set. Although these assumptions may differ significantly, the resulting final models show various similarities, which has frequently led to confusion. We give a detailed review on this subject, highlighting the differences and similarities between the models, and we shed some light on the critical issues associated with higher order transport models.

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A review of hydrodynamic and energy-transport models for semiconductor device simulation

This work describes an advanced physics-based compact MOSFET model (SP). Both the quasistatic and nonquasi-static versions of SP are surface-potential-based. The model is symmetric, includes the accumulation region, small-geometry effects, and has a consistent current and charge formulation. The surface potential is computed analytically and there are no iterative loops anywhere in the model. Availability of the surface potential in the source-drain overlap regions enables a physics-based formulation of the extrinsic model (e.g., gate tunneling current) and allows for a noise model free of discontinuities or unphysical interpolation schemes. Simulation results are used to illustrate the interplay between the model structure and circuit design.

SP: an advanced surface-potential-based compact MOSFET model

A physical understanding of both intrinsic and extrinsic noise mechanisms in a MOSFET is developed. Intrinsic noise mechanisms fundamental to device operation include channel thermal noise, induced gate noise, and induced substrate noise. While the effect of channel thermal noise is observable at zero drain-to-source voltage, the induced gate and substrate noise do not manifest themselves under these conditions. However, the attendant fluctuations in the channel charge are observable by the passage of electric current through the device. Extrinsic noise mechanisms manifested due to structural evolution of the MOSFET include the distributed gate resistance noise, distributed substrate resistance noise, bulk charge effects, substrate current supershot noise, gate current noise, excess channel noise, and 1/f noise. Where available, compact noise models covering these noise mechanisms are explained. Also, where possible, methods of suppression of these mechanisms are highlighted. A survey of current public domain MOS models is presented, and a lack of comprehensive coverage of noise models is noted. Open areas of MOSFET noise research in the sub-hundred-nanometer regime are also highlighted. With suitable adaptation, noise concepts elucidated in the context of MOS transistors have a much wider applicability to the operation of HEMTs, JFETs, MESFETs, and other field-effect devices

Compact Noise Models for MOSFETs

The Boltzmann equation for transport in semiconductors is projected onto spherical harmonics in such a way that the resultant balance equations for the coefficients of the distribution function times the generalized density of states can be discretized over energy and real spaces by box integration. This ensures exact current continuity for the discrete equations. Spurious oscillations of the distribution function are suppressed by stabilization based on a maximum entropy dissipation principle avoiding the H transformation. The derived formulation can be used on arbitrary grids as long as box integration is possible. The approach works not only with analytical bands but also with full band structures in the case of holes. Results are presented for holes in bulk silicon based on a full band structure and electrons in a Si NPN bipolar junction transistor. The convergence of the spherical harmonics expansion is shown for a device, and it is found that the quasiballistic transport in nanoscale devices requires an expansion of considerably higher order than the usual first one. The stability of the discretization is demonstrated for a range of grid spacings in the real space and bias points which produce huge gradients in the electron density and electric field. It is shown that the resultant large linear system of equations can be solved in a memory efficient way by the numerically robust package ILUPACK.

Stable discretization of the Boltzmann equation based on spherical harmonics, box integration, and a maximum entropy dissipation principle

This paper presents an overview of the physics, modeling, and circuit implications of RF broad-band noise, low-frequency noise, and oscillator phase noise in SiGe heterojunction bipolar transistor (HBT) RF technology. The ability to simultaneously achieve high cutoff frequency (f/sub T/), low base resistance (r/sub b/), and high current gain (/spl beta/) using Si processing underlies the low levels of low-frequency 1/f noise, RF noise, and phase noise of SiGe HBTs. We first examine the RF noise sources in SiGe HBTs and the RF noise parameters as a function of SiGe profile design, transistor biasing, sizing, and operating frequency, and then show a low-noise amplifier design example to bridge the gap between device and circuit level understandings. We then examine the low-frequency noise in SiGe HBTs and develop a methodology to determine the highest tolerable low-frequency 1/f noise for a given RF application. The upconversion of 1/f noise, base resistance thermal noise, and shot noises to phase noise is examined using circuit simulations, which show that the phase noise corner frequency in SiGe HBT oscillators is typically much smaller than the 1/f corner frequency measured under dc biasing. The implications of SiGe profile design, transistor sizing, biasing, and technology scaling are examined for all three types of noises.

Noise in SiGe HBT RF Technology: Physics, Modeling, and Circuit Implications

For pt. I see ibid., vol. 49, pp. 1250-1257 (2002). Terminal current noise is investigated with Langevin-type drift-diffusion (DD) and hydrodynamic (HD) noise models for one-dimensional (1-D) N/sup +/ NN/sup +/ and P/sup +/ PP/sup +/ structures and a realistic two-dimensional (2-D) SiGe NPN HBT. The new noise models, which are suitable for technology computer aided design (TCAD), are validated by comparison with Monte Carlo (MC) device simulations for the 1-D structures including noise due to particle scattering and generation of secondary particles by impact ionization (II). It is shown that the accuracy of the usual approach based on the DD model in conjunction with the Einstein relation degrades under nonequilibrium conditions. 2-D MC noise simulations are found to be feasible only if the current correlation functions decay on a subpicosecond scale, what is not always the case.

Hierarchical 2-D DD and HD noise simulations of Si and SiGe devices II. Results

Transit times of a silicon/germanium heterojunction bipolar transistor (HBT) with a base width of 24 nm are investigated in the quasi-stationary limit for the first time by consistent drift-diffusion (DD), hydrodynamic (HD), and fullband Monte Carlo (MC) simulations. The quasi-ballistic transport in the base and collector leading to a strong velocity overshoot is well described by the HD model and corresponding transit times are in good agreement with the MC results. On the other hand, the DD model fails in this region and substantially overestimates the base transit time bearing the possibility of wrong guidelines for transistor design optimization. However, since the base transit time is no longer dominating the cutoff frequency of high-speed HBTs, the failure of the DD model leads to an underestimation of the peak cutoff frequency by only 10%. Close to high injection differences in the emitter transit times of the HD and MC model are observed which are mainly related to small differences in the Gummel plot.

Comparative study of electron transit times evaluated by DD, HD, and MC device simulation for a SiGe HBT

Good agreement between a hydrodynamic and a Monte-Carlo device model isdemonstrated in this paper for an advanced SiGe Heterojunction Bipolar Transistor.This result is based on two principles: 1) Extraction (from the Monte-Carlo bulk modelunder homogeneous conditions) of the relaxation times τ at discrete points of theparameter space spanned by the Ge-content x, doping density N, carrier temperature T C and lattice temperature T L . 2 ) Modeling of the relaxation times τ ( x , T C , T L ) bysplines.

https://downloads.hindawi.com/journals/vlsi/1998/049783.pdf

Consistent Hydrodynamic and Monte-Carlo Simulation of SiGe HBTs Based on Table Models the Relaxation Times

A model for RF CMOS circuit design is presented that is capable of predicting drain and gate current noise without adjusting any parameters. Additionally, the presence of (i) noise associated with avalanche multiplication, and (ii) shot noise of the direct-tunneling gate current in leaky dielectrics is revealed.

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Compact modeling of drain and gate current noise for RF CMOS

A comprehensive investigation of the SPICE and unified compact noise models is performed by comparison with the more fundamental hierarchical hydrodynamic device model. It is shown that the rather simple SPICE and unified compact noise models yield good results for frequencies up to 10 GHz for state-of-the-art SiGe HBTs with a low base resistance. The base noise resistance, a key parameter of the compact noise models turns out to be independent of frequency and bias. It can be well estimated based on the sheet resistance of the intrinsic and extrinsic base or with the modified circle-fit method. The unified model, which in comparison to the SPICE model considers in addition the finite transit time of shot noise, is found to be somewhat more accurate than the SPICE model, especially at higher frequencies and collector currents. But this is achieved at the expense of a transit time parameter which cannot be determined without accurate and detailed noise measurements or physics-based numerical simulations.

https://ieeexplore.ieee.org/iel5/16/28898/01300831.pdf

B. Neinhus

Papers

Hierarchical 2-D DD and HD noise simulations of Si and SiGe devices II. Results

Comparative study of electron transit times evaluated by DD, HD, and MC device simulation for a SiGe HBT

Consistent Hydrodynamic and Monte-Carlo Simulation of SiGe HBTs Based on Table Models the Relaxation Times

Compact modeling of drain and gate current noise for RF CMOS

Investigation of Compact Models for RF Noise in