Rapid digital technology advancement has resulted in a tremendous increase in computing tasks imposing stringent energy efficiency and area efficiency requirements on next-generation computing. To meet the growing data-driven demand, in-memory computing and transistor-based computing have emerged as potent technologies for the implementation of matrix and logic computing. However, to fulfil the future computing requirements new materials are urgently needed to complement the existing Si complementary metal–oxide–semiconductor technology and new technologies must be developed to enable further diversification of electronics and their applications. The abundance and rich variety of electronic properties of two-dimensional materials have endowed them with the potential to enhance computing energy efficiency while enabling continued device downscaling to a feature size below 5 nm. In this Review, from the perspective of matrix and logic computing, we discuss the opportunities, progress and challenges of integrating two-dimensional materials with in-memory computing and transistor-based computing technologies. This Review discusses the recent progress and future prospects of two-dimensional materials for next-generation nanoelectronics.

Two-dimensional materials for next-generation computing technologies.

Two-dimensional (2D) semiconductors have attracted tremendous interest as atomically thin channels that could facilitate continued transistor scaling. However, despite many proof-of-concept demonstrations, the full potential of 2D transistors has yet to be determined. To this end, the fundamental merits and technological limits of 2D transistors need a critical assessment and objective projection. Here we review the promise and current status of 2D transistors, and emphasize that widely used device parameters (such as carrier mobility and contact resistance) could be frequently misestimated or misinterpreted, and may not be the most reliable performance metrics for benchmarking 2D transistors. We suggest that the saturation or on-state current density, especially in the short-channel limit, could provide a more reliable measure for assessing the potential of diverse 2D semiconductors, and should be applied for cross-checking different studies, especially when milestone performance metrics are claimed. We also summarize the key technical challenges in optimizing the channels, contacts, dielectrics and substrates and outline potential pathways to push the performance limit of 2D transistors. We conclude with an overview of the critical technical targets, the key technological obstacles to the 'lab-to-fab' transition and the potential opportunities arising from the use of these atomically thin semiconductors.

Promises and prospects of two-dimensional transistors

Nanoelectronic devices based on 2D materials are far from delivering their full theoretical performance potential due to the lack of scalable insulators. Amorphous oxides that work well in silicon technology have ill-defined interfaces with 2D materials and numerous defects, while 2D hexagonal boron nitride does not meet required dielectric specifications. The list of suitable alternative insulators is currently very limited. Thus, a radically different mindset with respect to suitable insulators for 2D technologies may be required. We review possible solution scenarios like the creation of clean interfaces, production of native oxides from 2D semiconductors and more intensive studies on crystalline insulators. The lack of scalable, high-quality insulators is a major problem hindering the progress on electronic devices built from 2D materials. Here, the authors review the current state-of-the-art and the future prospects of suitable insulators for 2D technologies.

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Insulators for 2D nanoelectronics: the gap to bridge.

Field-effect transistors based on two-dimensional (2D) materials have the potential to be used in very large-scale integration (VLSI) technology, but whether they can be used at the front end of line or at the back end of line through monolithic or heterogeneous integration remains to be determined. To achieve this, multiple challenges must be overcome, including reducing the contact resistance, developing stable and controllable doping schemes, advancing mobility engineering and improving high-κ dielectric integration. The large-area growth of uniform 2D layers is also required to ensure low defect density, low device-to-device variation and clean interfaces. Here we review the development of 2D field-effect transistors for use in future VLSI technologies. We consider the key performance indicators for aggressively scaled 2D transistors and discuss how these should be extracted and reported. We also highlight potential applications of 2D transistors in conventional micro/nanoelectronics, neuromorphic computing, advanced sensing, data storage and future interconnect technologies. This Review examines the development of field-effect transistors based on two-dimensional materials and considers the challenges that need to be addressed for the devices to be incorporated into very large-scale integration (VLSI) technology.

Transistors based on two-dimensional materials for future integrated circuits

Electromagnetic absorption materials: current progress and new frontiers

Semiconductors are the basis of many vital technologies such as electronics, computing, communications, optoelectronics, and sensing. Modern semiconductor technology can trace its origins to the invention of the point contact transistor in 1947. This demonstration paved the way for the development of discrete and integrated semiconductor devices and circuits that has helped to build a modern society where semiconductors are ubiquitous components of everyday life. A key property that determines the semiconductor electrical and optical properties is the bandgap. Beyond graphene, recently discovered two-dimensional (2D) materials possess semiconducting bandgaps ranging from the terahertz and mid-infrared in bilayer graphene and black phosphorus, visible in transition metal dichalcogenides, to the ultraviolet in hexagonal boron nitride. In particular, these 2D materials were demonstrated to exhibit highly tunable bandgaps, achieved via the control of layers number, heterostructuring, strain engineering, chemical doping, alloying, intercalation, substrate engineering, as well as an external electric field. We provide a review of the basic physical principles of these various techniques on the engineering of quasi-particle and optical bandgaps, their bandgap tunability, potentials and limitations in practical realization in future 2D device technologies.

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Bandgap engineering of two-dimensional semiconductor materials

Two-dimensional semiconductors could be used as a channel material in low-power transistors, but the deposition of high-quality, ultrathin high-κ dielectrics on such materials has proved challenging. In particular, atomic layer deposition typically leads to non-uniform nucleation and island formation, creating a porous dielectric layer that suffers from current leakage, particularly when the equivalent oxide thickness is small. Here, we report the atomic layer deposition of high-κ gate dielectrics on two-dimensional semiconductors using a monolayer molecular crystal as a seeding layer. The approach can be used to grow dielectrics with an equivalent oxide thickness of 1 nm on graphene, molybdenum disulfide (MoS2) and tungsten diselenide (WSe2). Compared with dielectrics created using established methods, our dielectrics exhibit a reduced roughness, density of interface states and leakage current, as well as an improved breakdown field. With the technique, we fabricate graphene radio-frequency transistors that operate at 60 GHz, and MoS2 and WSe2 complementary metal–oxide–semiconductor transistors with a supply voltage of 0.8 V and subthreshold swing down to 60 mV dec−1. We also create MoS2 transistors with a channel length of 20 nm, which exhibit an on/off ratio of over 107. Using a monolayer molecular crystal as a seeding layer, hafnium oxide dielectrics with an equivalent oxide thickness of only 1 nm can be deposited on graphene, molybdenum disulfide and tungsten diselenide.

Daowei He

Papers

Bandgap engineering of two-dimensional semiconductor materials

Uniform and ultrathin high-κ gate dielectrics for two-dimensional electronic devices