E
Ewout Martens
Researcher at Katholieke Universiteit Leuven
Publications - 67
Citations - 916
Ewout Martens is an academic researcher from Katholieke Universiteit Leuven. The author has contributed to research in topics: CMOS & Comparator. The author has an hindex of 17, co-authored 64 publications receiving 700 citations. Previous affiliations of Ewout Martens include IMEC.
Papers
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Journal ArticleDOI
A 0.9 V 0.4-6 GHz Harmonic Recombination SDR Receiver in 28 nm CMOS With HR3/HR5 and IIP2 Calibration
Barend van Liempd,Jonathan Borremans,Ewout Martens,Sungwoo Cha,Hans Suys,Bob Verbruggen,Jan Craninckx +6 more
TL;DR: A software-defined radio receiver is presented, operating from 400 MHz to 6 GHz, which ensures high out-of-band linearity and compliance with LTE and future standards.
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A +70-dBm IIP3 Electrical-Balance Duplexer for Highly Integrated Tunable Front-Ends
Barend van Liempd,Benjamin Hershberg,Saneaki Ariumi,Kuba Raczkowski,Karl-Frederik Bink,Udo Karthaus,Ewout Martens,Piet Wambacq,Jan Craninckx +8 more
TL;DR: In this paper, an electrical-balance duplexer achieving the state-of-the-art linearity and insertion loss (IL) performance is presented, enabled by a partially depleted RF silicon-on-insulator CMOS technology.
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Classification of analog synthesis tools based on their architecture selection mechanisms
Ewout Martens,Georges Gielen +1 more
TL;DR: This overview paper presents a classification and brief descriptions of design strategies supported by analog EDA tools developed by researchers and companies in recent history over more than 20 years to help the analog designer to select the right approach for the right task.
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RF-to-Baseband Digitization in 40 nm CMOS With RF Bandpass $\Delta\Sigma$ Modulator and Polyphase Decimation Filter
Ewout Martens,Andre Bourdoux,Aissa Couvreur,R. Fasthuber,P. Van Wesemael,G. Van der Plas,Jan Craninckx,Julien Ryckaert +7 more
TL;DR: A fourth-order continuous-time RF bandpass ΔΣ ADC has been fabricated in 40 nm CMOS for fs/4 operation around a 2.22 GHz central frequency enabling high oversampling ratios for RF digitization without compromising power-efficient implementation of the DFD.
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A DTC-Based Subsampling PLL Capable of Self-Calibrated Fractional Synthesis and Two-Point Modulation
Nereo Markulic,Kuba Raczkowski,Ewout Martens,Pedro Emiliano Paro Filho,Benjamin Hershberg,Piet Wambacq,Jan Craninckx +6 more
TL;DR: The paper provides an overview of the mechanisms that contribute to performance degradation in DTC-based PLL/phase modulators and presents ways to mitigate them and demonstrates state-of-the-art performance in nanoscale CMOS for fractional-N synthesis and phase modulation.