Iouliia Skliarova

TL;DR: Experimental results that allow high-performance ports in Zynq microchips to be evaluated taking into account parallel computations and their influence on throughput of FIR filters found that although parallel traffic leads to performance degradation, actual throughput is reduced not very significantly.

TL;DR: Three different techniques are discussed, namely graph walk, using tree-like structures and sorting networks, which enable the performance of processing for different types of data to be increased compared to known implementations.

TL;DR: This chapter is dedicated to searching networks, which permit to find extreme values in a set of data and to check if there are items satisfying some predefined conditions or limitations, indicated by given thresholds.

TL;DR: Evaluating tree-based implementations of data sorting algorithms in FPGA circuits using hierarchical finite state machine (HFSM) as a computational core shows effectiveness of sorting algorithms over data structures represented in form of N-ary trees.

TL;DR: The paper suggests a technique for fast data processing of unique and constrained items based on two methods that involve: 1) address-based data sorting; and 2) communication-time networks.