Showing papers by "Johann W. Kolar published in 2020"

Artificial Neural Network (ANN) Based Fast and Accurate Inductor Modeling and Design

Abstract: This paper analyzes the potential of Artificial Neural Networks (ANNs) for the modeling and optimization of magnetic components and, specifically, inductors. After reviewing the basic properties of ANNs, several potential modeling and design workflows are presented. A hybrid method, which combines the accuracy of 3D Finite Element Method (FEM) and the low computational cost of ANNs, is selected and implemented. All relevant effects are considered (3D magnetic and thermal field patterns, detailed core loss data, winding proximity losses, coupled loss-thermal model, etc.) and the implemented model is extremely versatile (30 input and 40 output variables). The proposed ANN-based model can compute 50'000 designs per second with less than 3% deviation with respect to 3D FEM simulations. Finally, the inductor of a 2 kW DC-DC buck converter is optimized with the ANN-based workflow. From the Pareto fronts, a design is selected, measured, and successfully compared with the results obtained with the ANNs. The implementation (source code and data) of the proposed workflow is available under an open-source license.

Dynamic on -Resistance in GaN-on-Si HEMTs: Origins, Dependencies, and Future Characterization Frameworks

Abstract: Gallium nitride high-electron-mobility transistors (GaN HEMTs) exhibit dynamic on -resistance (d ${R_{\text{on}}}$ ), where the on -resistance immediately after turn- on is higher than the dc value at the same junction temperature. A proliferation of recent literature reports d ${R_{\text{on}}}$ , with some publishing an eight times increase in conduction losses and others finding that the problem is nonexistent. This variation can be largely attributed to the standardized double-pulse-test (DPT) method, which does not specify the blocking time and will ignore any effects that accumulate over multiple switching cycles. With no consistent measurements, designers are left without an accurate conduction loss estimate in converters with GaN HEMTs. We discuss the underlying causes of charge trapping to find the key influences over d ${R_{\text{on}}}$ , and show that the DPT technique gives invalid results. Our measurements validate that each operating parameter must be independently controlled and that only steady-state d ${R_{\text{on}}}$ measurements will predict in situ performance. For the commercial GaN HEMT tested in this letter, the worst-case d ${R_{\text{on}}}$ is nearly two times higher than the dc resistance at the same temperature, confirming that accurate d ${R_{\text{on}}}$ characterization remains critical to predicting converter characteristics. Finally, we provide a reporting framework for GaN HEMT manufacturers and methods to estimate conduction losses in converters with GaN HEMTs.

99% Efficient Isolated Three-Phase Matrix-Type DAB Buck–Boost PFC Rectifier

Abstract: Three-phase power factor correction rectifiers are an essential area of power electronics, supplying a direct current load with tens of kilowatts, or more, from the public three-phase mains and achieving sinusoidal input currents. In many applications, isolation is required between the mains and the load, for example, due to safety reasons or different grounding schemes. This paper describes the modulation, design, and realization of a buck–boost-type, unity-power-factor, isolated matrix-type, dual-active-bridge, three-phase rectifier. It uses a circuit similar to a conventional dual-active-bridge converter, but employs a direct matrix converter to connect the high-frequency transformer's primary winding to the mains. A soft-switching modulation scheme is proposed and comprehensively analyzed, deriving closed-form solutions and numerical optimization problems to calculate switching times that achieve minimal conduction losses. Based on this analysis, the design of an 8-kW 400-V rms three-phase ac to 400-V dc prototype is discussed, striving for the highest possible efficiency. Using 900-V SiC mosfet s and a transformer with an integrated inductor, a power density of ${\text{4}}\; {\text{kW}\cdot \text{dm}^{-3}}$ ( ${\text{66}}\; {\text{W}\cdot \text{in}^{-3}}$ ) is achieved. Measurement results confirm an ultrahigh full-power efficiency of 99.0% at nominal operating conditions and 98.7% at 10% lower input voltage.

Active Magnetizing Current Splitting ZVS Modulation of a 7 kV/400 V DC Transformer

Abstract: The LLC series resonant converter (SRC) is one of the most popular galvanically isolated dc–dc converters since it provides zero voltage switching (ZVS), reduces rms currents, and tightly couples the input and output voltages, when it is operated at (or below) the resonance frequency, and, therefore, acts as a dc transformer (DCX) without requiring closed-loop voltage control. Hence, this topology is of particular importance for the dc–dc converter stage of high power medium voltage to low voltage solid-state transformers (SSTs). This paper first highlights the limitations of passive and synchronous rectification (e.g., oscillations, current distortion, load-dependent voltage transfer ratio) for bridges employing semiconductors with large output capacitances. Afterward, a magnetizing current splitting ZVS (MCS-ZVS) modulation scheme, which allows an active sharing of the magnetizing current between the primary side and secondary side metal oxide semiconductor field effect transistor ( mosfet )-based bridges, is analyzed. It is shown that the ZVS mechanism is acting equivalent to a controller, allowing for a robust open-loop operation of the converter. The proposed modulation scheme features a load-independent voltage transfer ratio, load-independent ZVS for both bridges, and quasi-sinusoidal currents. Finally, the phase shift modulation scheme is experimentally verified for the SiC mosfet -based dc–dc converter of a ${\text{25}}$ kW ac–dc SST, which operates at ${\text{48}}$ kHz between a ${\text{7}}$ kV and a ${\text{400}}$ V dc bus with an efficiency of ${\text{99.0}}{\%}$ .

New Figure-of-Merit Combining Semiconductor and Multi-Level Converter Properties

Abstract: Figures-of-Merit (FOMs) are widely-used to compare power semiconductor materials and devices and to motivate research and development of new technology nodes. These material- and device-specific FOMs, however, fail to directly translate into quantifiable performance in a specific power electronics application. Here, we combine device performance with specific bridge-leg topologies to propose the extended FOM, or X-FOM, a Figure-of-Merit that quantifies bridge-leg performance in multi-level (ML) topologies and supports the quantitative comparison and optimization of topologies and power devices. To arrive at the proposed X-FOM, we revisit the fundamental scaling laws of the on-state resistance and output capacitance of power semiconductors to first propose a revised device-level semiconductor Figure-of-Merit (D-FOM). The D-FOM is then generalized to a multi-level topology with an arbitrary number of levels, output power, and input voltage, resulting in the X-FOM that quantitatively compares hard-switched semiconductor stage losses and filter stage requirements across different bridge-leg structures and numbers of levels, identifies the maximum achievable efficiency of the semiconductor stage, and determines the loss-optimal combination of semiconductor die area and switching frequency. To validate the new X-FOM and showcase its utility, we perform a case study on candidate bridge-leg structures for a three-phase 10 kW photovoltaic (PV) inverter, with the X-FOM showing that (a) the minimum hard-switching losses are an accurate approximation to predict the theoretically maximum achievable efficiency and relative performance between bridge-legs and (b) the 3-level bridge-leg outperforms the 2-level configuration, despite utilizing a SiC MOSFET with a lower D-FOM than in the 2-level case.

The essence of the little box challenge-part A: Key design challenges & solutions

Abstract: In order to expedite the development of power electronic systems towards higher power density and efficiency at a lower cost of implementation, Google and IEEE initiated the Google Little Box Challenge (GLBC) aiming for the worldwide smallest 2 kVA / 450 V DC / 230 V AC single-phase PV inverter with η > 95 % CEC weighted efficiency and an air-cooled case temperature of less than 60 °C by using latest power semiconductor technology and innovative topological concepts. This paper, i.e., Part A of a discussion of The Essence of the Little Box Challenge, documents all important RD Part B is intended to convey the main findings and lessons learned from the participation in the GLBC. First, the key technical challenges of the GLBC are discussed and the technologies and concepts selected by the authors among different options are described in detail. Relevant design considerations, such as constant frequency pulse width modulation (PWM) or triangular current mode (TCM) operation of the bridge-legs, selection of power semiconductor technology, interleaving of bridge-legs, sizing of the power buffer capacitor, limitation of ground/leakage currents, etc., to achieve an ultra-compact implementation are discussed. Based on this overview, two promising inverter concepts to tackle the GLBC, (i) an H-bridge based inverter with DC-link referenced output filter and (ii) a DC/|AC| buck-stage with series-connected low-frequency (LF) |AC|/AC unfolder inverter, are then analyzed in detail. Based on the results of a multi-objective ηρ-Pareto optimization, a comparative evaluation of the performance in terms of efficiency (η) and power density (ρ) of the two considered inverter concepts is provided. It is shown that with the DC/|AC| buck-stage and |AC|/AC H-bridge unfolder inverter operated with 140 kHz PWM a power density of 14.7 kW/dm 3 (240 W/in 3 ) with a maximum efficiency of 98.1% at 2 kW output power can be achieved. These claims are then verified in Part B by means of experimental results obtained from prototype realizations and compared to the achievements of other GLBC finalists. The conclusions are of general importance and are providing key guidelines for the future development of ultra-compact power electronic converters.

Analysis of a synergetically controlled two-stage three-phase DC/AC buck-boost converter

Abstract: Three-phase DC/AC power electronics converter systems used in battery-powered variable-speed drive systems or employed in three-phase mains-supplied battery charger applications usually feature two power conversion stages. In both cases, typically a DC/DC stage is attached to a three-phase DC/AC stage in order to enable buck-boost functionality and/or a wide input-output voltage operating range. However, a two-stage solution leads to a high number of switched bridge-legs and hence, results in high switching losses, if the degrees of freedom available for controlling the overall system are not utilised. If the DC/DC stage is used to vary the DC link voltage with six times the AC-side frequency, a pulse width modulation (PWM) of always only one phase of the DC/AC stage is sufficient to achieve three-phase sinusoidal output currents. The clamping of two phases (denoted as 1/3 PWM) leads to a drastic reduction of the DC/AC stage switching losses, which is further accentuated by a DC link voltage which is lower than for the conventional modulation schemes. This paper details the operating principle of a three-phase buck-boost converter system using 1/3 PWM and outlines an appropriate control system design. Subsequently, the switching losses and the voltage/current stresses on the converter components are analytically derived. There, a more than 66% reduction of the DC/AC stage switching losses is calculated without any increase of the stress on the remaining converter components. The theoretical considerations are finally verified on a hardware demonstrator, where the proposed modulation strategy is experimentally compared against several conventional modulation techniques and its clear performance advantages are validated.

Experimental Characterization of Silicon and Gallium Nitride 200 V Power Semiconductors for Modular/Multi-Level Converters Using Advanced Measurement Techniques

Abstract: The increasing demand for higher power densities and higher efficiencies in power electronics, driven by the aerospace, electric vehicle, and renewable energy industries, encourages the development of new converter concepts. In particular, modular and/or multi-level (M/ML) topologies are employed to break the performance barriers of the state-of-the-art power converters by simultaneously reducing the system losses and volume/weight. These improvements mainly originate from the replacement of high-voltage transistors, typical of two-level converters, with low-voltage, e.g., 200 V, devices, offering superior electric performance. Hence, two low on-state resistance silicon (Si) and gallium nitride (GaN) 200 V power semiconductors are comprehensively characterized in this article to support the multi-objective optimization and the design of M/ML power converters. First, the selected devices are analyzed experimentally determining their conduction, thermal, and switching characteristics; for this purpose, a novel ultra-fast transient calorimetric measurement method is introduced and explained in detail. In the course of this analysis, an unexpected switching loss mechanism is observed in the Si devices at hand; the physical reason of this behavior is clarified and it is proven to be solved in the next-generation research samples, which are also characterized by measurements. Finally, the influence of the measured power semiconductors’ performance on the overall efficiency and power density of a typical converter is determined through a case study analyzing a hard switching half-bridge operated as a single-phase inverter, i.e., the fundamental building block of several M/ML topologies. It is concluded that, in this voltage and power class, GaN e-FETs are nowadays approximately a factor of three superior to Si power MOSFETs; however, the better heat dissipation achieved by the latter still makes them the preferred solution for higher power applications.

Novel ZVS S-TCM Modulation of Three-Phase AC/DC Converters

Abstract: For three-phase AC-DC power conversion, the widely-used continuous current mode (CCM) modulation scheme results in relatively high semiconductor losses from hard-switching each device during half of the mains cycle. Triangular current mode (TCM) modulation, where the inductor current reverses polarity before turn-off, achieves zero-voltage-switching (ZVS) but at the expense of a wide switching frequency variation (15× for the three-phase design considered here), complicating filter design and compliance with EMI regulations. In this paper, we propose a new modulation scheme, sinusoidal triangular current mode (S-TCM), that achieves soft-switching, keeps the maximum switching frequency below the 150 kHz EMI regulatory band, and limits the switching frequency variation to only 3×. Under S-TCM, three specific modulation schemes are analyzed, and a loss-optimized weighting of the current bands across load is identified. The 2.2 kW S-TCM phase-leg hardware demonstrator achieves 99.7% semiconductor efficiency, with the semiconductor losses accurately analytically estimated within 10% (0.3 W). Relative to a CCM design, the required filter inductance is 6× lower, the inductor volume is 37% smaller, and the semiconductor losses are 55% smaller for a simultaneous improvement in power density and efficiency.

Three-Phase Bidirectional Buck-Boost Current DC-Link EV Battery Charger Featuring a Wide Output Voltage Range of 200 to 1000V

Abstract: High power EV chargers connected to an AC power distribution bus are employing a three-phase AC/DC Power Factor Correction (PFC) front-end and a series-connected isolated DC/DC converter to efficiently regulate the traction battery voltage and supply the required charging current. In this paper, the component stresses and the design optimization of a novel two-stage three-phase bidirectional buck-boost current DC-link PFC rectifier system, realized solely with SiC power MOSFETs and conveniently requiring only a single magnetic component, are introduced. This topology offers a high efficiency in a wide operating range thanks to the synergetic operation of its two stages, the three-phase buck-type current source rectifier stage and the subsequent three-level boost-type DC/DC-stage, which makes it suitable for on-board as well as off-board charger applications. The calculated voltage and current component stresses of the proposed converter system, considering an output voltage range of 200 to 1000V and up to 10kW of output power, help to identify its operating boundaries, maximizing the utilization of the power semiconductors and of the DC-link inductor. The optimum values of the circuit parameters are selected after evaluating the converter average efficiency $\bar \eta $ and volumetric power density ρ in the Pareto performance space and analyzing its design space diversity, focusing on the semiconductor losses and on the characteristics of the inductor. Considering typical EV battery charging profiles, i.e. taking both full-load and part-load operation into account, a power converter realization featuring $\bar \eta = 98.5\% $ and ρ =13.9kW/dm3 is achieved.

Dielectric Losses in Dry-Type Insulation of Medium-Voltage Power Electronic Converters

Abstract: Newly available medium-voltage (MV) silicon carbide (SiC) transistors are setting new limits for the design space of MV converters. Unprecedented blocking voltages, higher switching frequencies, higher commutation speeds, lower losses, and high temperature operation can be reached, which, however, create new challenges for the electrical insulation. In particular, the dielectric losses can become significant for MV converters operated at higher switching frequencies. Moreover, the evaluation of the dielectric losses is a key element for assessing the insulation stress and for insulation diagnostics. Therefore, this paper analyzes the modeling and the computation of dielectric losses with pulsewidth modulated (PWM) voltages. After a review of the dielectric loss mechanisms occurring in polymeric insulation materials, scalable analytical expressions are proposed for the losses produced by PWM voltages. Afterward, the dielectric losses of a medium-frequency (MF) transformer, employed in a 25 kW MV dc–dc converter (7 kV–400 V) operated at 48 kHz, are analyzed and measured in detail. With epoxy resin, the insulation losses represent a significant share, i.e., up to 17%, of the total transformer losses. As shown, the transformer performance can be significantly improved with silicone elastomer insulation. Finally, design guidelines are provided for the selection of insulation materials.

Minimum Loss Operation and Optimal Design of High-Frequency Inductors for Defined Core and Litz Wire

Abstract: This paper studies the loss-optimal design of a power inductor employed in a 2 kW, 400 V input DC–DC converter. The design of an inductor is subject to a large number of design parameters and the implications of the different design parameters on the losses are often not clearly traceable in a full optimization, e.g., different current ripple amplitudes can lead to designs with similar losses, as larger ripple amplitudes lead to increased AC core and winding losses but lower DC losses in the winding due to lower inductance values and/or numbers of turns. In an effort to achieve a comprehensible description of the implications of the key design parameters (switching frequency, $f_\text{s} $ , current ripple, r , number of turns, N ) on the losses, the remaining parameters, e.g., core (E55/28/21 N87) and type of conductor (litz wire), are considered to be given. In a first step, the investigation is based on a simplified analytical model, which is refined in a step-by-step manner, e.g., to consider core saturation. In a second step, the implications of further critical aspects on the losses, e.g., temperatures of core and coil, are examined using a comprehensive semi-numerical model. Surprisingly, the evaluation of the losses calculated in the $f_\text{s}$ – $r$ domain reveals that nearly minimum inductor losses are obtained for a current ripple that is inversely proportional to the frequency, i.e., for a constant inductance, within a wide frequency range, from 200 kHz to 1 MHz. Furthermore, the investigation reveals a decrease of the losses for increasing frequencies up to 375 kHz, e.g., from 4.32 W at 80 kHz ( r = 110 %) to 2.37 W at 375 kHz ( r = 18 %). The detailed analysis related to these results enables the compilation of a simple two-equation guide for the design of an inductor that achieves close to minimum losses. In a next step, interesting trade-offs are identified based on a study of the design space diversity, e.g., with respect to low cost and increased partial-load efficiency. The findings of this work are experimentally verified, i.e., the losses of three different inductors are measured with an accurate calorimetric method and at four different frequencies, ranging from 150 kHz to 700 kHz.

Medium-frequency transformer scaling laws: Derivation, verification, and critical analysis

Abstract: Medium-frequency transformers (MFTs) are one of the fundamental building blocks of modern power electronic converters. The usage of increased frequencies leads to improved characteristics, i.e., efficiency and power density (volumetric and gravimetric) but also to design challenges and constraints. This paper reviews the analytical modeling of MFTs. More particularly, the mapping between the design space and the performance space is analyzed. It is found that wide regions of the design space are mapped to a narrow region in the performance space, i.e., the optimum is flat and designs with very different parameters features similar performances (design space diversity). Scaling laws are derived for optimal MFTs operated at different power ratings and power densities, which provide a comprehensive and general insight on the achievable performances. In a next step, the results obtained with the analytical model are compared to numerical simulations. It is concluded that the derived scaling laws capture qualitatively and quantitatively the behavior of MFTs, but should be used with caution for accurate design processes.

Novel iGSE-C Loss Modeling of X7R Ceramic Capacitors

Abstract: Due to the large relative permittivity of Class II dielectrics, ceramic capacitors (CCs) from these materials promise significant volume and weight reductions in inverter and rectifier sine-wave filters, and are especially attractive in mobile applications that demand ultrahigh power density. While previous literature found large low-frequency losses in these components, no extensible loss model was proposed to accurately characterize these ferroelectric losses. In this article, we take advantage of prior art on ferro magnetic components in power electronics to propose a Steinmetz parameter-based loss modeling approach for X7R CCs, named the Improved Generalized Steinmetz Equation for CCs, or iGSE-C. This model is verified using the Sawyer–Tower circuit to measure losses in a commercially available X7R capacitor across excitation magnitude, dc bias, temperature, excitation frequency, and harmonic injection. Losses are shown to scale according to a power law with charge, with the resulting Steinmetz coefficients valid across dc bias and slightly varying as the temperature is increased. The iGSE-C accurately predicts losses for typical nonsinusoidal phase voltage waveforms with an error under 8%. Finally, the loss modeling technique is demonstrated for the sine-wave output filter of a bridge-leg arrangement with both low- and high-frequency excitations, with total capacitor losses predicted within 12% accuracy.

Novel Highly Efficient/Compact Automotive PCB Winding Inductors Based on the Compensating Air-Gap Fringing Field Concept

Abstract: The design of power electronic converters is subject to extreme cost pressure, especially in the automotive sector. Consequently, each component needs to be optimized regarding material and manufacturing cost. The latter is especially important for magnetic components, as the expensive wire-wrapping process has a significant impact on the overall production costs. In this article, a new inductor concept is proposed, where the winding is directly integrated into the printed circuit board (PCB), while at the same time the usually large high-frequency conduction losses are mitigated. This is achieved by using the fringing field around a single air gap or several (distributed) air gaps for compensating the adverse magnetic skin and proximity fields within the winding. Consequently, low ac to dc resistance ratios are achieved and the required copper cross-section of the winding can effectively be reduced. Furthermore, a thermal model for the printed circuit board winding is derived, which allows for designing PCB windings close to the thermal limit, and therefore inductors with very high power densities are obtained. Finally, the findings of this article are verified by experimental measurements and a simplified design sequence is described.

The Impact of Multi-MHz Switching Frequencies on Dynamic On-Resistance in GaN-on-Si HEMTs

Abstract: Dynamic on-resistance ( ${\text{d}R_\text{on}}$ ), where the on-resistance immediately after turn-on is higher than the DC resistance, increases the conduction losses in power converters with gallium nitride high-electron-mobility transistors (GaN HEMTs). There exist no direct ${\text{d}R_\text{on}}$ measurements in the literature above ${1}\,\text{MHz}$ , leaving designers unable to predict conduction losses in emerging multi-MHz applications. We address this literature gap by collecting the first on-state voltage ${\text{d}R_\text{on}}$ measurements at multi-MHz frequencies, with a focus on the zero-voltage-switching conditions that are predominantly employed at high frequency. On the selected commercially-available HEMT with a breakdown voltage below ${200}\,\text{V}$ , the dynamic contribution asymptotes above $\approx {2}\,\text{MHz}$ , a finding predicted by the slow time constants of the traps that cause ${\text{d}R_\text{on}}$ . For the tested HEMT, we find a maximum ${\text{d}R_\text{on}}$ increase over the DC resistance of 2 $\times $ in a multi-MHz, zero-voltage-switched application.

Three-Phase Sinusoidal Output Buck-Boost GaN Y-Inverter for Advanced Variable Speed AC Drives

Abstract: Motor drive systems supplied by a fuel-cell/battery are especially demanding when it comes to the design of the inverter. Besides a high performance (high efficiency η and power density ρ), the inverter has to cope with the wide DC voltage variation of the fuel-cell/battery that supplies the motor drive. A promising three-phase inverter topology, denoted as Y-VSI, is presented in this paper. The Y-VSI is a modular three-phase inverter, and comprises three identical phase-modules connected to a common star “Y” point. Each phase-module is equivalent to a buck-boost DC/DC converter, which allows the AC output voltages to be higher or lower than the DC input voltage. Thereby, the Y-VSI effectively copes with the wide variation of the fuel-cell/battery voltage. Each phase-module can be operated in a similar fashion to a conventional DC/DC converter, independently of the remaining two phases. Accordingly, a straightforward and simple operation/control of the Y-VSI is possible. In addition, the Y-VSI features an integrated output filter. This allows for continuous/sinusoidal motor voltage waveforms, eliminating the need of an additional filter between the inverter and the motor. This paper details the operating principle of the Y-VSI, and comparatively evaluates two modulation strategies. In order to validate the proposed concepts, a Y-VSI hardware prototype is assembled within the context of a high-speed motor drive. In the investigated drive system, a fuel-cell supplies the Y-VSI, which in return controls a 280 krpm 1 kW electric compressor. The Y-VSI hardware prototype is compared against a state-of-the-art hardware prototype, which features two energy conversion stages. It is shown that the Y-VSI is ∆η = +2.3% more efficient and at the same time ∆ρ = +10% more power dense compared to the conventional inverter solution.

Experimental Analysis and Optimization of a Contactless Eddy-Current-Based Speed Sensor for Smooth Conductive Surfaces

Abstract: Speed sensing is an essential part in all closed-loop systems. There exist some situations in industry where the speed has to be measured without touching the target object, for example, the accurate speed measurement of the solid metal wheels with smooth surfaces of freight wagons. In this article, a contactless, eddy-current-based speed sensor is proposed for applications where the speed of a smooth conductive surface is to be measured; but contact to or modification of this target surface is prohibited. The proposed speed sensor is composed of a permanent magnet (PM) rotor that is free to rotate above the target surface. The relative motion of the surface with respect to the PM field induces eddy currents in the surface, which leads to a torque being applied on the rotor. Consequently, the PM rotor speeds up until it reaches a steady rotational speed that is proportional to the speed of the target surface. Three models are proposed. They are a two-dimensional (2-D) finite-element model, a 2-D analytical model, and a three-dimensional (3-D) combined numerical/analytical model. Measurements are taken on multiple hardware prototypes to validate the analysis. Finally, a multiobjective (PM volume vs. dynamic performance) Pareto optimization is conducted for the proposed speed sensing system. The results show that smaller rotors with lower pole-pair numbers generally have better dynamic performance as well as lower costs.

Comparative Evaluation of 800V DC-Link Three-Phase Two/Three-Level SiC Inverter Concepts for Next-Generation Variable Speed Drives

Abstract: The adoption of wide band-gap (WBG) semiconductors is gaining momentum, particularly in industries where high efficiency and/or extreme power density are major concerns, e.g. electric transportation and aerospace. In order to fully leverage the advantages of WBG devices, identifying the converter topologies best exploiting their superior performance is of utmost importance. Hence, this paper analyzes and compares 2-level and 3-level SiC-based three-phase inverters for next-generation variable speed drives. Full sine-wave filtering at the converter output is assumed to counteract the negative effects of the fast switching transitions of WBG devices on the driven machine. The stresses on the active and passive components, i.e. semiconductor losses, output inductor flux ripple and DC- link capacitor RMS current, are calculated by analytical and/or numerical means. Moreover, the optimal semiconductor chip area, the power losses and the efficiency of each converter topology are investigated as functions of the switching frequency, providing a theoretical performance limit for each solution. Finally, a multi-objective optimization targeting an 800 V 7.5 kW system is carried out. The results are in good agreement with the theoretical performance analysis and provide an overview of the achievable efficiency vs. power density trade-off for all the considered topologies.

Enhanced Complex Space Vector Modeling and Control System Design of Multiphase Magnetically Levitated Rotary–Linear Machines

Abstract: Rotary–linear electric machines can perform coupled rotary and linear motion. In addition, they can have magnetic bearings (MBs) integrated and magnetically coupled with the rotary, linear, or rotary–linear machine operation. Since rotary–linear machines with MBs have not been thoroughly analyzed in the literature, the models that provide understanding of their operation and give basis for the control system implementation are not entirely covered. Hence, in this article, an enhanced complex space vector-based model of the rotary–linear machine with MBs is derived and expressions for the torque, thrust force, and MB force are given. The rotary–linear machine complex space vector of the voltage, current, or flux linkage is defined using the proposed transformation with two complex frames: one related to the rotation and MBs and another to the linear motion. This results in complex space vectors with two complex units; however, the techniques used for a conventional complex space vector calculation can also be applied to the proposed complex space vector description. This is also experimentally validated on a hardware prototype of a magnetically levitated linear tubular actuator (MALTA), whose position control system is designed and implemented based on the enhanced space vector modeling approach, with the dynamic operation of the MALTA, including linear motor operation with an axial stroke of 10mm and a mechanical frequency of 17Hz.

Analysis and Evaluation of Active/Hybrid/Passive dv/dt-Filter Concepts for Next Generation SiC-Based Variable Speed Drive Inverter Systems

Abstract: State-of-the-art variable speed drive inverter systems are typically employing 1200 V Si IGBTs with antiparallel freewheeling diodes, resulting in a large overall semiconductor chip area, relatively high switching losses and/or low switching frequencies, and causing a substantial on-state voltage drop in both current directions, which inherently limits the peak and part-load efficiency. SiC MOSFETs are seen as natural future replacement of Si IGBTs, since they benefit from high switching speeds and low on-state resistances, which drastically reduces switching and conduction losses. However, the high switching speed of SiC devices results in a dv/dt-stress on the motor windings of up to 60...80 V/ns, which must be limited to 3...6 V/ns in order to prevent partial discharge phenomena and/or progressive insulation aging. Full sinewave filtering could solve this issue, but would also reduce the achievable performance improvement, as a higher switching frequency and/or a bulky filter would be required. Therefore, this paper comparatively evaluates different dv/dt-limitation approaches proposed in literature, i.e. active, hybrid and passive filter concepts, for a next generation 10kW SiC PWM inverter supplied from an 800V DC-bus. First, the different filter concepts are described and analyzed, and in a second step their design procedure is explained based on the design space approach. Afterwards, a Pareto optimization is conducted and Pareto optimal designs are selected, evaluated and compared regarding efficiency and power density. All considered filter designs outperform a state-of-the-art typically 98.3% efficient IGBT inverter drive. The hybrid filter enables a part-load (at 8 kW) efficiency of 99.0% for a dv/dt limited to 6 V/ns. If higher dv/dt -values can be tolerated, e.g. 12 V/ns, 99.3% part-load efficiency with a power density above 80 kW/L can be achieved by the active concept.

Three-Phase Bidirectional Ultra-Wide Output Voltage Range Current DC-Link AC/DC Buck-Boost Converter

Abstract: High power EV chargers connected to AC power distribution architectures employ a three-phase (3-Φ) PFC rectifier front-end and a series-connected isolated DC/DC converter to cover a wide range of traction battery voltages and efficiently supply the required charging current. In this paper, the operating principle of a two-stage 3-Φ buck-boost current DC-link PFC rectifier system is first introduced. Its optimal operating modes, minimizing conduction losses, switching losses, and CM noise emissions for every DC output voltage level, are identified. Adequate modulation strategies are proposed and explained through detailed switching patterns. Importantly, the two stages of the PFC rectifier system, i.e. the 3-Φ buck-type current source rectifier input stage and the subsequent three-level boost DC/DC stage, are controlled synergetically which ensures an automatic selection and seamless transition between the optimal combinations of operating modes of both stages. Simulation results verify the operation of the described power converter for different output voltage and output power levels. Furthermore, a new common-mode (CM) filtering method, requiring a CM DC-link inductor and a capacitive connection between an artificial 3-Φ neutral point and the DC output mid-point, is analyzed with the support of a derived CM equivalent circuit. Finally, a complete guideline for the design of the CM filter, based on analytical calculations of the CM voltage-time area, is presented.

Optimized Cascaded Controller Design for a 10 kW / 100 kHz Large Signal Bandwidth AC Power Source

Abstract: The control system of a phase-modular three-phase 10 kW / 230 V rms Ultra-High bandwidth series/parallel inter-leaved multi-level AC Power Source (UHPS) for P-HIL applications with 4.8 MHz effective switching frequency is optimized with respect to high bandwidth and low output impedance or output admittance (depending on whether output voltage or output current is controlled), by adding selected and effective enhancements to existing control structures. The theoretical findings are verified by means of a detailed simulation model, which also takes time-discretization effects arising from the FPGA-based digital control unit into account. The comparative evaluation of the investigated control structures reveals that the combination of capacitor current feedback, inductor voltage feed-forward, and reference prediction performs best for the control of both, output voltage and output current. In this regard, at 100 kHz and for operation with rated load resistance of 5.3 Ω, the phase-lag of the output voltage of the optimized voltage control system can be reduced from 19°, for the conventional two-loop control structure, to 7°; the small-signal bandwidth increases from 235 kHz to 427 kHz; and the output impedance at 100 kHz decreases from 0.6 Ω to 143 mΩ. In case of output current control, at an output frequency of 60 kHz, and for rated load resistance, the phase-lag of the output current can be reduced from 51° to 33°, for an optimized three-loop control structure, which is accompanied by an increase of the small-signal bandwidth from 63 kHz to 89 kHz and an increase of the output impedance from 11 Ω to 30 Ω at 60 kHz.

A Wide Air Gap Flux Switching Bearingless Motor With Odd and Even Pole Pair Numbers

Abstract: This paper introduces a bearingless motor topology with a magnet-free rotor that provides a higher rotor torque density and wider magnetic air gap compared to previously published topologies. The stray flux is minimized by using a stator with only eight teeth in temple configuration that contain permanent magnets. The motor performance is analyzed based on experimental prototypes, that were designed using 3D FEM simulations, for even and odd rotor pole pair numbers of six and nine, respectively. Control schemes that compensate parasitic radial forces to achieve stable magnetic levitation of the rotors are presented. The implemented prototypes reached a rotational speed of 2000 rpm and a maximum torque of 8 Nm.

The Essence of the little box challenge-part B: Hardware demonstrators & comparative evaluations

Abstract: In order to expedite the development of power electronic systems towards higher power density and efficiency at a lower cost of implementation, Google and IEEE initiated the Google Little Box Challenge (GLBC) aiming for the worldwide smallest 2 kVA/450 VDC/230 VAC single-phase PV inverter with η > 95% CEC weighted efficiency and an air-cooled case temperature of less than 60 °C by using latest power semiconductor technology and innovative topological concepts. This paper, i.e. Part B of a discussion of The Essence of the Little Box Challenge, presents the hardware implementations and novel control concepts of two GaN-based inverter systems selected by the authors to counter the challenge: (i) Little Box 1.0 (LB 1.0), a H-bridge inverter with two interleaved bridge-legs both operated with Triangular Current Mode (TCM) modulation which features a power density of 8.18 kW/dm 3 (134 W/in 3 ) and a nominal efficiency of 96.4% and (ii) Little Box 2.0 (LB 2.0), an inverter topology with single bridgeleg DC/|AC| buck-stage operated with constant frequency PWM and a subsequent |AC|/AC H-bridge unfolder, which features a remarkable power density of 14.8 kW/dm 3 (243 W/in 3 ) and a nominal efficiency of 97.4% Implemented using latest GaN power semiconductor technology, Zero Voltage Switching (ZVS) throughout the AC period and a variable switching frequency in the range of 200 kHz-1 MHz in order to shrink the size of filter passives, the LB 1.0 was ranked among the top 10 out of 100+ teams actively participating in the GLBC. The LB 2.0 is the result of further research and considers lessons learned from the GLBC and achieves despite moderate 140 kHz constant frequency PWM and hard-switching around the peak of the AC output current a higher power density ρ and a higher efficiency η. For both implemented prototypes experimental results are provided to confirm that all GLBC technical requirements are met. The experimental results include steady-state and step-response waveforms, EMI and ground current measurements, as well as efficiency and operating temperature measurements. The reason for the ηρ-performance improvement of LB 2.0 over LB 1.0 are then discussed in detail. Furthermore, the solutions of other GLBC finalists are described and then compared to the performance achieved with the hardware prototypes presented in this paper. This leads to findings of general importance and provides key guideline for the future development of ultracompact power electronic converters.

Design and experimental analysis of a three-phase active CM/DM conducted EMI noise separator

Abstract: This work investigates three-phase electromagnetic interference (EMI) conducted emission (CE) measurements with the aim to separate the noise voltages in their common-mode (CM) and differential-mode (DM) parts. By doing so, the converter input and/or output filter stages can be individually optimized to improve the CM or DM attenuation depending on the origin of the CE disturbances. An overview of various ways to achieve this separation is provided and an active three-phase noise separator is presented. The main advantage of the presented active solution is the absence of magnetic components in the signal path which drastically facilitates the matching at high frequencies. The influence of asymmetries and mismatches of the component parasitics as well as in the circuit board layout are analyzed. To assess the performance of the proposed system according to widely known metrics such as CM and DM transfer functions and rejection ratios, different test methods are established and the implied limitations regarding maximum measurable performance are considered. Finally, experimental results verifying the calculated separation capabilities are provided.

Optimal Synergetic Control of a Three-Phase Two-Stage Ultra-Wide Output Voltage Range EV Battery Charger Employing a Novel Hybrid Quantum Series Resonant DC/DC Converter

Abstract: A wide output voltage range (200 − 1000V DC ) isolated two-stage three-phase EV charger is proposed. The system employs a boost-type two-level PFC rectifier front-end and the subsequent novel Hybrid Quantum Series Resonant DC/DC Converter (H-QSRC) output stage, which is left either unregulated with constant voltage transfer ratio or is used to emulate a buck or boost behavior. For reducing the H-QSRC voltage transfer ratio discretization, replacing one of the two-level primary side bridge-legs with a three-level T-type arrangement and a microscopic duty cycle operation are considered. The PFC rectifier stage is either operated in conventional boost-mode with two out of three phases switching (2/3 -mode), or in 1/3 -mode. For 1/3 -mode, always the most positive and the most negative input phase are clamped to the positive and negative DC bus, and only the phase with the smallest voltage / current is switching, which minimizes switching losses. Different combinations of the operating modes of the PFC rectifier stage and the H-QSRC stage and the resulting current and voltage stresses on the main power components are analyzed. Furthermore, the best synergetic combination of the operating modes of both stages is identified for the different output voltage regions. Finally, a corresponding control structure, which achieves a smooth transition between all operating regimes is presented, and it is shown, that the extremely wide output voltage range can be covered without overdesign of any of the two converter stages.

Wide-Input-Voltage-Range 3 kW DC-DC Converter with Hybrid LLC & Boundary / Discontinuous Mode Control

Abstract: Growing applications such as electric vehicles, data centers, and industrial robotics require power-dense and efficient converters systems to provide high output currents at low output voltages of generally 12 V Today’s converters achieve high efficiencies at a specific input voltage, but drastically lose efficiency once the input voltage deviates from its nominal value A large voltage swing, however, is a common situation in the aforementioned applications, as the respective input voltages, in worst-case, can easily drop by 50 %, whereby full functionality still needs to be maintained In this work, we demonstrate a wide-input-voltage-range 400 V to 12 V, 3 kW dc-dc converter with a novel control method and transformer design The employed boundary/discontinuous mode control scheme reduces circulating currents over conventional LLC techniques, and the "snake-core" matrix transformer achieves ideal parallel-connected secondary voltage balance The converter achieves 350 W/in3 power density while operating from 300 V to 430 V input voltage and from 10 % to full load An advanced design for a data center power supply application additionally utilizes the magnetizing inductance for boost operation in order to optimize the operating conditions of the converter system and to increase the overall efficiency A performance comparison is finally explored for comparing the advanced design with the current hardware demonstrator and with conventional LLC converters

Performance Benchmarking of a Novel Magnet-Free Bearingless Synchronous Reluctance Slice Motor

Abstract: This paper presents a novel bearingless synchronous reluctance slice motor topology that contains no permanent magnets. The rotor with two iron poles and flux barriers is levitated and rotated through a stator winding system with six coils wired as two three-phase systems. A constant rotor-oriented magnetization current is applied to generate a magnetic bias flux. The system can be controlled similar to a bearingless permanent magnet synchronous slice motor and provides passive stabilization of axial and tilting movements of the rotor. The motor topology is discussed in detail and a prototype implementation is presented. Its performance with regard to passive properties, achievable torque, controllability, and wide air gap suitability is benchmarked against two other designs that contain permanent magnets either in the rotor or the stator. A loss analysis of all topologies is performed and suitable application areas are identified. The proposed design provides an interesting alternative to existing bearingless slice motor topologies in applications that require high rotational speeds, high process or ambient temperatures, or a disposable low-cost rotor with short exchange intervals.

Analysis of Double-Bridge Inverters for Drive Systems with Open-End Winding Motors

Abstract: The double-bridge voltage source inverter (DB-VSI) is a promising inverter topology for high performing motor drives. A DB-VSI comprises two VSIs, connected to the opposite sides of an open-end winding motor (no floating neutral point). Thanks to its inherent properties, a DB-VSI requires only half DC supply voltage, compared to a simple VSI, in order to generate the same motor voltage. Thereafter, by processing/switching only half of the DC supply voltage, the DB-VSI benefits from significantly lower semiconductor devices’ switching losses. The DB-VSI technology is the main focus of this paper. Namely, two different DB-VSI variants and/or modulation strategies are comparatively evaluated. After detailing the operating principle of each modulation strategy, the stresses on the inverter components are analytically derived. It is shown that the selection of the DB-VSI modulation strategy impacts the efficiency/power density of the inverter and the voltage quality of the motor. The theoretical considerations are subsequently verified within the context of a high-speed motor drive. In the investigated drive system, a fuel-cell supplies the inverter, which in return controls a 280krpm 1kW electric compressor. Two DB-VSI hardware prototypes are purposely assembled and compared against a third state-of-the-art hardware prototype of the same specifications. It is shown that, thanks to the DB-VSI technology it is possible to reduce simultaneously the volume and the losses by up to 50% compared to the state-of-the-art solution. The low DB-VSI volume enables a seamless integration of the inverter in the motor housing. Accordingly, the open-end winding motor is directly attached to the inverter, eliminating the need for cumbersome and costly interconnecting cables. A final, integrated (inverter/motor) hardware prototype is presented, that further highlights the advantages of the DB-VSI technology.