Showing papers by "John W. Palmour published in 2006"

Techniques for Minimizing the Basal Plane Dislocation Density in SiC Epilayers to Reduce Vf Drift in SiC Bipolar Power Devices

Abstract: Forward voltage instability, or Vf drift, has confounded high voltage SiC device makers for the last several years. The SiC community has recognized that the root cause of Vf drift in bipolar SiC devices is the expansion of basal plane dislocations (BPDs) into Shockley Stacking Faults (SFs) within device regions that experience conductivity modulation. In this presentation, we detail relatively simple procedures that reduce the density of Vf drift inducing BPDs in epilayers to

Temperature dependence of the current gain in power 4H-SiC NPN BJTs

Abstract: For 1-kV 30-A 4H-SiC epitaxial emitter n-p-n bipolar junction transistors, the dependences of the common-emitter current gain /spl beta//sub CE/ on the collector current I/sub C/ were measured at elevated temperatures. The collector-emitter voltage was fixed (at 100 V) to provide an active operation mode at all collector currents varying in a wide range from 150 mA to 40 A (current densities of 24-6350 A/cm/sup 2/). The maximum current gain was measured to be /spl beta//sub CEmax/=40(I/sub C/=7 A) at room temperature and /spl beta//sub CEmax/=32(I/sub C/=10 A) at 250/spl deg/C. The /spl beta//sub CE/-I/sub C/ dependences were simulated in terms of a model that takes into account the main processes affecting the current gain: 1) recombination in the emitter-base space charge region; 2) surface recombination; 3) crowding of the emitter current; 4) decrease in the emitter-injection coefficient at high-level injection; and 5) ionization of deep acceptors. The minority carrier lifetimes and surface recombination velocity were obtained by means of this simulation.

High Temperature Characterization of 4H-SiC Bipolar Junction Transistors

Abstract: This paper summarizes the recent demonstration of 3200 V, 10 A BJT devices with a high common emitter current gain of 44 in the linear region, and a specific on-resistance of 8.1 mΩ- cm2 (10 A at 0.90 V with a base current of 350 mA and an active area of 0.09 cm2). The onresistance increases to 40 mΩ-cm2 at 350°C, while the DC current gain decreases to 30. A sharp avalanche behavior was observed with a leakage current of 10 μA at a collector voltage of 3.2 kV.

Influence of Basal Plane Dislocation Induced Stacking Faults on the Current Gain in SiC BJTs

Abstract: SiC BJTs show instability in the I-V characteristics after as little as 15 minutes of operation. The current gain reduces, the on-resistance in saturation increases, and the slope of the output characteristics in the active region increases. This degradation in the I-V characteristics continues with many hours of operation. It is speculated that this phenomenon is caused by the growth of stacking faults from certain basal plane dislocations within the base layer of the SiC BJT. Stacking fault growth within the base layer is observed by light emission imaging. The energy for this expansion of the stacking fault comes from the electron-hole recombination in the forward biased base-emitter junction. This results in reduction of the effective minority carrier lifetime, increasing the electron-hole recombination in the base in the immediate vicinity of the stacking fault, leading to a reduction in the current gain. It should be noted that this explanation is only a suggestion with no conclusive proof at this stage.

Energy Efficiency: The Commercial Pull for SiC Devices

Abstract: As SiC devices begin to become commercially available, it is becoming clear that electrical efficiency improvement is one of the key drivers for their adoption For RF applications, SiC MESFETs have the ability to be easily linearized via digital pre-distortion to offer a 47% improvement in efficiency In broadband WiMax applications, SiC MESFETs offer more than double the efficiency versus using GaAs MESFETs SiC Schottky diodes are allowing up to a 25% reduction in losses in power supplies for computers and servers when used in the power factor correction circuit For motor control, SiC Schottkys allow up to a 33% reduction in losses, as demonstrated for a 3 HP motor drive Even higher efficiencies can be obtained when the Schottkys are combined with a SiC switch A 400 W boost converter has been demonstrated using a SiC MOSFET and Schottky diode, operating at >200° C, with an extremely high efficiency of 98% These improvements in electrical efficiency can have a significant impact in reducing overall electricity consumption worldwide, impacting virtually every aspect of electrical usage, ranging from information technology to motor control, with potential savings of $35 billion/yr

Development of 8 mΩ-cm2, 1.8 kV 4H-SiC DMOSFETs

Abstract: 8 mΩ-cm2, 1.8 kV power DMOSFETs in 4H-SiC are presented in this paper. A 0.5 μm long MOS gate length was used to minimize the MOS channel resistance. The DMOSFETs were able to block 1.8 kV with the gate shorted to the source. At room temperature, a specific onresistance of 8 mΩ-cm2 was measured with a gate bias of 15 V. At 150 oC, the specific onresistance increased to 9.6 mΩ-cm2. The increase in drift layer resistance due to a decrease in bulk electron mobility was partly cancelled out by the negative shift in MOS threshold voltage at elevated temperatures. The device demonstrated extremely fast, low loss switching characteristics. A significant improvement in converter efficiency was observed when the 4H-SiC DMOSFET was used instead of an 800 V silicon superjunction MOSFET in a simple boost converter configuration.

A Study on the Reliability and Stability of High Voltage 4H-SiC MOSFET Devices

Abstract: Gate oxide reliability measurements of 4H-SiC DMOSFETs were performed using the Time Dependent Dielectric Breakdown (TDDB) technique at 175°C. The oxide lifetime is then plotted as a function of the electric field. The results show the projected oxide lifetime to be > 100 years at an operating field of ~3 MV/cm. Device reliability of 2.0 kV DMOSFETs was studied by stressing the gate with a constant gate voltage of +15 V at a temperature of 175°C, and monitoring the forward I-V characteristics and threshold voltage for device stability. Our very first measurements show very little variation between the pre-stress and post-stress conditions up to 1000 hrs of operation at 175°C. In addition, forward on-current stressing of the MOSFETs show the devices to be stable up to 1000 hrs of operation.

4.5 kV 120A SICGT and Its PWM Three Phase Inverter Operation of 100kVA class

Abstract: 4.5 kV 120 A SICGT with a chip size of 8 mm times 8 mm and a new high heat resistive resin capable of 400 degC operations were developed. The SICGT coated with the resin has a low leakage current of less than 5 times 106 A/cm2 at both 4.5 kV and 250 degC, a low VF of 5.0 V at 120 A, and short turn-on and turn-off times of 0.3 mus and 1.7 mus respectively. A SICGT module was built by mounting one SICGT and two 6mm times 6mm SiC pn diodes in a metal can package, and a 110 kVA PWM 3 phase inverter was developed by using six of the SICGT modules. The electric power capabilities of both the developed SICGT and the 3 phase inverter are the largest ones among the reported SiC switching devices and SiC inverters, respectively

Generation-recombination noise in forward biased 4H-SiC p-n diodes

Abstract: Low frequency noise has been studied in forward biased 4H‐SiC p+‐n diodes at current densities from 10−4to10A∕cm2. At small current densities j⩽10−3A∕cm2, the spectral noise density SI follows the law SI∝1∕f3∕2. At 10−3A∕cm2

Methods of fabricating oxide layers on silicon carbide layers utilizing atomic oxygen

Abstract: Methods of forming oxide layers on silicon carbide layers are disclosed, including placing a silicon carbide layer in a chamber such as an oxidation furnace tube that is substantially free of metallic impurities, heating an atmosphere of the chamber to a temperature of about 500 °C to about 1300 °C, introducing atomic oxygen in the chamber, and flowing the atomic oxygen over a surface of the silicon carbide layer to thereby form an oxide layer on the silicon carbide layer. In some embodiments, introducing atomic includes oxygen providing a source oxide in the chamber and flowing a mixture of nitrogen and oxygen gas over the source oxide. The source oxide may comprise aluminum oxide or another oxide such as manganese oxide. Some methods include forming an oxide layer on a silicon carbide layer and annealing the oxide layer in an atmosphere including atomic oxygen.

High-temperature (up to 800 K) operation of 6-kV 4H-SiC junction diodes

Abstract: Steady-state and transient characteristics of packaged 6-kV 4H-SiC junction diodes have been investigated in the temperature range Т = 300 – 773 К. Analysis of the forward current-voltage characteristics and reverse current recovery waveforms shows that the lifetimeτ of non-equilibrium carriers in the base of the diodes steadily increases with temperature across the entire temperature interval. The rise in τ and decrease in carrier mobilities and diffusion coefficients with increasing temperature nearly compensate each other as regards their effect on the differential resistance of the diode, Rd. As a result, Rd is virtually temperature independent. An appreciable modulation of the base resistance takes place at room temperature even at a relatively small current density j of 20 A/cm2. At T = 800 K and j = 20 A/cm2, a very deep level of the base modulation has been observed. The bulk reverse current is governed by carrier generation in the space-charge region via a trap with activation energy of 1.62 eV. The surface leakage current of packaged structures does not exceed 2×10-6 А at T = 773 K and a reverse bias of 300 V.

Simulations of 10 kV trench gate IGBTs on 4H-SiC

Abstract: Numerical simulations were conducted on 10 kV trench gate p-IGBTs on 4H-SiC. A punch-through structure was utilized with a p-type buffer layer on an n-type substrate. A p-type conduction- layer was incorporated underneath the n-type base layer to mitigate the JFET effect from the trench bottom implants. Simulation results have shown that both the carrier lifetimes and the mesa width are the two dominant factors in the device current handling capability. A sufficient drift layer conduction modulation can be achieved with a minority lifetime of >2 μs in the drift layer, and >100 ns in the buffer layer. A mesa width of 2 μm provides a high forward current due to the high channel periphery density.

First Demonstration of 2.1 kW Output Power at 425 MHz Using 4H-SiC RF Power BJTs

Abstract: For the first time, 4H-SiC RF bipolar junction transistors have been used to produce an output power in excess of 2.1 kW at 425 MHz. For an input pulse width of 2 μs and 1% duty cycle, the power gain at peak output power is 6.3 dB with the collector efficiency and power added efficiency [PAE] being 45% and 35%, respectively, at a collector supply voltage of 75 V in a class C configuration. The package consists of 24 cells (2 chips) having an emitter periphery of approximately 1 inch per cell. Each cell produced a DC current gain (β) of 15 and a common emitter breakdown voltage (BVCEO) greater than 250 V. A peak output power of 87 W per cell was obtained at 425 MHz, as compared to the earlier report of 50 W per cell [1, 2] by using a shorter pulse width and duty cycle.

A 1cm × 1cm, 5kV, 100A, 4H-SiC Thyristor Chip for High Current Modules

Abstract: We report on the development of the first 1 cm x 1 cm SiC Thyristor chip capable of blocking 5 kV. This demonstrates the present quality of the SiC substrate and epitaxial material. A forward drop of 4.1 V at 100 A and 25°C has been measured. The turn-on delay is found to be a strong function of the gate current. At a gate current of 0.5 A, a turn-on delay of 250 ns is observed for an anode to cathode current of 200 A. The turn-on delay reduces to 72 ns for an IG = 1.5 A. The turn-on rise time is a strong function of the anode to cathode voltage, VAK. At VAK =230 V, the turn-on rise-time is 300 ns for IAK =200 A. The rise-time reduces to 26 ns for VAK = 500 V.

400 watt boost converter utilizing silicon carbide power devices and operating at 200°C baseplate temperature

Abstract: This paper reports on a 400 watt boost converter using a SiC BJT and a SiC MOSFET as the switch and a 6 Amp and a 50 Amp SiC Schottky diode as the output rectifier. The converter was operated at 100 kHz with an input voltage of 200 volts DC and an output voltage of 400 volts DC. The efficiency was tested with an output loaded from 50 watts to 400 watts at baseplate temperatures of 25°C, 100°C, 150°C and 200°C. The results show the converter in all cases capable of operating at temperatures beyond the range possible with silicon power devices. While the converter efficiency was excellent in all cases, the SiC MOSFET and 6 Amp Schottky diode had the highest efficiency. Since the losses in a boost converter are dominated by the switching losses and the switching losses of the SiC devices are unaffected by temperature, the efficiency of the converter was effectively unchanged as a function of temperature.