The conductivity of an $n$-type semiconductor has been calculated in the region of low-temperature $T$ and low impurity concentration ${n}_{D}$. The model is that of phonon-induced electron hopping from donor site to donor site where a fraction $K$ of the sites is vacant due to compensation. To first order in the electric field, the solution to the steady-state and current equations is shown to be equivalent to the solution of a linear resistance network. The network resistance is evaluated and the result shows that the $T$ dependence of the resistivity is $\ensuremath{\rho}\ensuremath{\propto}\mathrm{exp}(\frac{{\ensuremath{\epsilon}}_{3}}{\mathrm{kT}})$. For small $K$, ${\ensuremath{\epsilon}}_{3}=(\frac{{e}^{2}}{{\ensuremath{\kappa}}_{0}}){(\frac{4\ensuremath{\pi}{n}_{D}}{3})}^{\frac{1}{3}}(1\ensuremath{-}1.35{K}^{\frac{1}{3}})$, where ${\ensuremath{\kappa}}_{0}$ is the dielectric constant. At higher $K$, ${\ensuremath{\epsilon}}_{3}$ and $\ensuremath{\rho}$ attain a minimum near $K=0.5$. The dependence on ${n}_{D}$ is extracted; the agreement of the latter and of ${\ensuremath{\epsilon}}_{3}$ with experiment is satisfactory. The magnitude of $\ensuremath{\rho}$ is in fair agreement with experiment. The influence of excited donor states on $\ensuremath{\rho}$ is discussed.

Impurity Conduction at Low Concentrations.

The electrical activation of 1×1020 cm-3 implanted Al in 4H-SiC has been studied in the temperature range 1500 - 1950 °C by the analysis of the sheet resistance of the Al implanted layers, as measured at room temperature. The minimum annealing time for reaching stationary electrical at fixed annealing temperature has been found. The samples with stationary electrical activation have been used to estimate the thermal activation energy for the electrical activation of the implanted Al.

About the Electrical Activation of 1×1020 cm-3 Ion Implanted Al in 4H-SiC at Annealing Temperatures in the Range 1500 - 1950°C

Structural and Functional Characterizations of Al+ Implanted 4H-SiC Layers and Al+ Implanted 4H-SiC p-n Junctions after 1950°C Post Implantation Annealing

The hole transport properties of heavily doped 4H-SiC (Al) layers with Al implanted concentrations of 3  ×  1020 and 5  ×  1020 cm-3 and annealed in the temperature range 1950-2100 °C, have been analyzed to determine the main transport mechanisms. This study shows that the temperature dependence of the resistivity (conductivity) may be accounted for by a variable range hopping (VRH) transport into an impurity band. Depending on the concentration of the implanted impurities and the post-implantation annealing treatment, this VRH mechanism persists over different temperature ranges that may extend up to room temperature. In this framework, two different transport regimes are identified, having the characteristic of an isotropic 3D VRH and an anisotropic nearly 2D VRH. The latter conduction mechanism appears to take place in a rather thick layer (about 400 nm) that is too large to induce a confinement effect of the carrier hops. The possibility that an anisotropic transport may be induced by a structural modification of the implanted layer because of a high density of basal plane stacking faults (SF) in the implanted layers is considered. The interpretation of the conduction in the heaviest doped samples in terms of nearly 2D VRH is supported by the results of the transmission electron microscopy (TEM) investigation on one of the 5  ×  1020 cm-3 Al implanted samples of this study. In this context, the average separation between basal plane SFs, measured along the c-axis, which is orthogonal to the carrier transport during electrical characterization, appears to be in keeping with the estimated value of the optimal hopping length of the VRH theory. Conversely, no SFs are detected by TEM in a sample with an Al concentration of 1  ×  1019 cm-3 where a 3D nearest neighbor hopping (NNH) transport is observed.

Size effect on high temperature variable range hopping in Al+ implanted 4H-SiC.

To outline the hopping conduction range, the electrical characteristics of CVD-grown heavily Al-doped 4H-SiC thick epilayers (2.0 × 1019–4.0 × 1020 cm−3) were investigated in a wide temperature regime (20–900 K). It is found that, below 100 K, hopping conduction dominates the carrier transport for all epilayers, and the corresponding hopping conduction activation energy shows a maximum of ~30 meV at around 1.1 × 1020 cm−3. With increasing doping level, the temperature dependence of resistivity evolves and finally obeys the ~1/T1/4 law in the entire temperature regime, which gives direct evidence of variable-range hopping conduction.

https://iopscience.iop.org/article/10.7567/APEX.8.121302/pdf

Hopping conduction range of heavily Al-doped 4H-SiC thick epilayers grown by CVD

The processing parameters which favour the onset of an impurity band conduction around room temperature with a contemporaneous elevated p-type conductivity in Al+ implanted 4H-SiC are highlighted by comparing original and literature results. In the examined cases, Al is implanted at 300–400 °C, in concentrations from below to above the Al solubility limit in 4H-SiC (2 × 1020 cm−3) and post implantation annealing temperature is ≥1950 °C. Transport measurements feature the onset of an impurity band conduction, appearing at increasing temperature for increasing Al implant dose, until this transport mechanism is enabled around room temperature. This condition appears suitable to guarantee a thermal stability of the electrical properties. In this study, the heaviest doped and less resistive samples (Al implanted concentration of 5 × 1020 cm−3 and resistivity of about 2 × 10−2 Ω cm) show a carrier density above the Al solubility limit, which is consistent with at least a 50% electrical activation for a 15% comp...

Remarks on the room temperature impurity band conduction in heavily Al+ implanted 4H-SiC

/pdf/1950-c-post-implantation-annealing-of-al-implanted-4h-sic-4740qy7j45.pdf

1950°C Post Implantation Annealing of Al+ Implanted 4H-SiC: Relevance of the Annealing Time

In this work, we confirm and extend the results of a previous study where a variable range hopping transport through localized impurity states has been found to dominate the electrical transport properties of 3×1020 cm-3 and 5×1020 cm-3 Al+ implanted 4H-SiC layers after 1950-2000 °C post implantation annealing. In this study, samples with longer annealing times have been taken into account. The temperature dependence of these sample conductivity follows a variable range hopping law, consistent with a nearly two-dimensional hopping transport of non-interacting carriers that in the highest doped samples, persists up to around room temperature. This result indicates that the hole transport becomes strongly anisotropic on increasing the doping level. At the origin of this unusual electrical behavior, may be the presence of basal plane stacking faults, actually observed by transmission electron microscopy in one of the 5×1020 cm-3 samples

High Temperature Variable Range Hopping in Heavy Al Implanted 4H-SiC

Admittance spectroscopy was employed to investigate the electrical properties of buried GaSb homojunctions. A strong p-type surface layer was obtained in n-type GaSb bulk crystals through diffusion of Zn atoms. The acceptor impurities were introduced into Te-doped substrates by epitaxially growing a heavily p(Zn)-doped GaAs layer. Current-voltage investigation, after the removal of the GaAs cap layer, demonstrated the formation of the GaSb p-n homojunction. However, the p-n interface of the junctions resulted to be not due to the presence of Zn. In fact, secondary ion mass spectrometry pointed out only a small penetration depth of Zn atoms in the GaSb substrate (∼100 nm), whereas electron beam induced current investigation demonstrated that the p-n junction interface was located more deeply into the substrate (∼1 μm). Admittance spectroscopy and capacitance-voltage investigations led to attribute the change of conduction type from n to p of GaSb beyond the Zn penetration depth to the formation of lattice acceptor defects, influenced by the thermal annealing processes during and after the GaAs growth. An attempt to explain the formation of the buried junction in terms of atomic inter-diffusion is provided, in order to justify, from a microscopic point of view, the low diffusivity of Zn in GaSb, and the depth of the p-n junction interface in the substrate.

Admittance spectroscopy on buried GaSb junctions due to defect distribution in GaAs/GaSb metalorganic vapor phase epitaxy heterostructures

Van der Pauw devices have been fabricated by double ion implantation processes, namely P+ and Al+ co-implantation. Similarly to the source area in a SiC VD-MOSFET, a 5 × 1018 cm-3 P plateau is formed on the top of a buried 3 × 1018 cm-3 Al distribution for electrical isolation from the n- epilayer. The post implantation annealing temperature was 1600 °C. Annealing times equal to 30 min and 300 min have been compared. The increase of the annealing time produces both an increase of electron density as well as electron mobility. For comparison a HPSI 4H-SiC wafer, 1×1020 cm-3 P+ ion implanted and 1700 °C annealed for 30 min was also characterized.

/pdf/ion-implanted-phosphorous-for-4h-sic-vdmosfets-source-4ism6zqgiq.pdf

M. Gorni

Papers

Remarks on the room temperature impurity band conduction in heavily Al+ implanted 4H-SiC

1950°C Post Implantation Annealing of Al+ Implanted 4H-SiC: Relevance of the Annealing Time

High Temperature Variable Range Hopping in Heavy Al Implanted 4H-SiC

Admittance spectroscopy on buried GaSb junctions due to defect distribution in GaAs/GaSb metalorganic vapor phase epitaxy heterostructures

Ion implanted phosphorous for 4h-sic vdmosfets source regions: effect of the post implantation annealing time