Fluorescent carbon nanoparticles or carbon quantum dots (CQDs) are a new class of carbon nanomaterials that have emerged recently and have garnered much interest as potential competitors to conventional semiconductor quantum dots. In addition to their comparable optical properties, CQDs have the desired advantages of low toxicity, environmental friendliness low cost and simple synthetic routes. Moreover, surface passivation and functionalization of CQDs allow for the control of their physicochemical properties. Since their discovery, CQDs have found many applications in the fields of chemical sensing, biosensing, bioimaging, nanomedicine, photocatalysis and electrocatalysis. This article reviews the progress in the research and development of CQDs with an emphasis on their synthesis, functionalization and technical applications along with some discussion on challenges and perspectives in this exciting and promising field.

Carbon quantum dots and their applications

We present the science and technology roadmap for graphene, related two-dimensional crystals, and hybrid systems, targeting an evolution in technology, that might lead to impacts and benefits reaching into most areas of society. This roadmap was developed within the framework of the European Graphene Flagship and outlines the main targets and research areas as best understood at the start of this ambitious project. We provide an overview of the key aspects of graphene and related materials (GRMs), ranging from fundamental research challenges to a variety of applications in a large number of sectors, highlighting the steps necessary to take GRMs from a state of raw potential to a point where they might revolutionize multiple industries. We also define an extensive list of acronyms in an effort to standardize the nomenclature in this emerging field.

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Science and technology roadmap for graphene, related two-dimensional crystals, and hybrid systems

Atomic layer deposition(ALD), a chemical vapor deposition technique based on sequential self-terminating gas–solid reactions, has for about four decades been applied for manufacturing conformal inorganic material layers with thickness down to the nanometer range. Despite the numerous successful applications of material growth by ALD, many physicochemical processes that control ALD growth are not yet sufficiently understood. To increase understanding of ALD processes, overviews are needed not only of the existing ALD processes and their applications, but also of the knowledge of the surface chemistry of specific ALD processes. This work aims to start the overviews on specific ALD processes by reviewing the experimental information available on the surface chemistry of the trimethylaluminum/water process. This process is generally known as a rather ideal ALD process, and plenty of information is available on its surface chemistry. This in-depth summary of the surface chemistry of one representative ALD process aims also to provide a view on the current status of understanding the surface chemistry of ALD, in general. The review starts by describing the basic characteristics of ALD, discussing the history of ALD—including the question who made the first ALD experiments—and giving an overview of the two-reactant ALD processes investigated to date. Second, the basic concepts related to the surface chemistry of ALD are described from a generic viewpoint applicable to all ALD processes based on compound reactants. This description includes physicochemical requirements for self-terminating reactions,reaction kinetics, typical chemisorption mechanisms, factors causing saturation, reasons for growth of less than a monolayer per cycle, effect of the temperature and number of cycles on the growth per cycle (GPC), and the growth mode. A comparison is made of three models available for estimating the sterically allowed value of GPC in ALD. Third, the experimental information on the surface chemistry in the trimethylaluminum/water ALD process are reviewed using the concepts developed in the second part of this review. The results are reviewed critically, with an aim to combine the information obtained in different types of investigations, such as growth experiments on flat substrates and reaction chemistry investigation on high-surface-area materials. Although the surface chemistry of the trimethylaluminum/water ALD process is rather well understood, systematic investigations of the reaction kinetics and the growth mode on different substrates are still missing. The last part of the review is devoted to discussing issues which may hamper surface chemistry investigations of ALD, such as problematic historical assumptions, nonstandard terminology, and the effect of experimental conditions on the surface chemistry of ALD. I hope that this review can help the newcomer get acquainted with the exciting and challenging field of surface chemistry of ALD and can serve as a useful guide for the specialist towards the fifth decade of ALD research.

Surface chemistry of atomic layer deposition: A case study for the trimethylaluminum/water process

1: Magnetic Particles: Preparation, Properties and Applications: M. Ozaki. 2: Maghemite (gamma-Fe2O3): A Versatile Magnetic Colloidal Material C.J. Serna, M.P. Morales. 3: Dynamics of Adsorption and Oxidation of Organic Molecules on Illuminated Titanium Dioxide Particles Immersed in Water M.A. Blesa, R.J. Candal, S.A. Bilmes. 4: Colloidal Aggregation in Two-Dimensions A. Moncho-Jorda, F. Martinez-Lopez, M.A. Cabrerizo-Vilchez, R. Hidalgo Alvarez, M. Quesada-PMerez. 5: Kinetics of Particle and Protein Adsorption Z. Adamczyk.

Surface and Colloid Science

An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Semiconductor device, and manufacturing method thereof

We report a change in the semimetallic nature of single-layer graphene after exposure to oxygen plasma. The resulting transition from semimetallic to semiconducting behavior appears to depend on the duration of the exposure to the plasma treatment. The observation is confirmed by electrical, photoluminescence and Raman spectroscopy measurements. We explain the opening of a bandgap in graphene in terms of functionalization of its pristine lattice with oxygen atoms. Ab initio calculations show more details about the interaction between carbon and oxygen atoms and the consequences on the optoelectronic properties, that is, on the extent of the bandgap opening upon increased functionalisation density.

https://iopscience.iop.org/article/10.1088/0957-4484/21/43/435203/pdf

Bandgap opening in oxygen plasma-treated graphene.

In search of a proper passivation for high-k Ge metal-oxide-semiconductor devices, the authors have deposited high-k dielectric layers on GeO2, grown at 350–450°C in O2. ZrO2, HfO2, and Al2O3 were deposited by atomic layer deposition (ALD). GeO2 and ZrO2 or HfO2 intermix during ALD, together with partial reduction of Ge4+. Almost no intermixing or reduction occurs during Al2O3 ALD. Capacitors show well-behaved capacitance-voltage characteristics on both n- and p-Ge, indicating efficient passivation of the Ge∕GeOx interface. The density of interface states is typically in the low to mid-1011cm−2eV−1 range, approaching state-of-the-art Si∕HfO2∕matal gate devices.

Effective electrical passivation of Ge(100) for high-k gate dielectric layers using germanium oxide

In this work the electron tunnelling in device grade ultra-thin 3–6 nm n + poly-Si/SiO 2 /n-Si structures has been analysed. The well known analytic expression for the Fowler-Nordheim tunnelling current was adapted to include the case of direct tunnelling of electrons, which becomes important for oxide layers thinner than 4.5 nm. For these ultra-thin oxide MOS structures it is necessary to take the band bending in the Si substrate and in the poly-Si layer into account to determine the oxide electrical field strength and to derive the tunnelling parameters of the measured current-voltage characteristic. A method is explained to derive the tunnel barrier height φ s and the effective mass of the tunnelling electron m ox from the experimental tunnel current characteristics. It is shown that both the direct tunnelling and the Fowler-Nordheim tunnelling current can be quantitatively explained by a WKB approximation using m ox as the single fitting parameter.

Determination of tunnelling parameters in ultra-thin oxide layer poly-Si/SiO2/Si structures

Over the years, many new materials have been introduced in advanced complementary metal oxide semiconductor (CMOS) processes in order to continue the trend of reducing the gate length and increasing the performance of CMOS devices. This is clearly evidenced in the International Technology Roadmap for Semiconductors (ITRS), which indicates the requirements and technological challenges in the microelectronics industry in various technology nodes. Every new technology node, characterized by the minimal device dimensions that are used, has required innovations in new materials and transistor design. The introduction of deposited high-κ gate dielectrics and metal gates as replacements for the thermally grown SiO2 and poly-Si electrode was a major challenge that has been met in the transition toward the 32 nm technology node since it replaced the heart of the metal oxide semiconductor structure. For the next generation of technology nodes, even bigger hurdles will need to be overcome, since new device structures and high-mobility channel materials such as Ge and III–V compounds might be needed, according to the ITRS roadmap, to meet the power and performance specifications of the 16 nm CMOS node and beyond. The basic properties of these high-mobility channel materials and their impact on the device performance have to be fully understood to allow process integration and full-scale manufacturing. In addition to thermal stability, compatibility with other materials, electronic transport properties, and especially the passivation of electronically active defects at the interface with a high-κ dielectric, are enormous challenges. Many encouraging results have been obtained, but the stringent demands in terms of electrical performance and oxide thickness scaling needed for highly scaled CMOS devices are not yet fully met. Other areas where breakthroughs will be needed are the formation of low-resistivity contacts, especially on III–V materials, and III–V materials suited for pMOS channels. An overview of the major successes and remaining critical issues in the materials research on high-mobility channel materials for advanced CMOS devices is given in this issue of MRS Bulletin.

https://www.cambridge.org/core/services/aop-cambridge-core/content/view/S0883769400003201

Ultimate Scaling of CMOS Logic Devices with Ge and III–V Materials

A strong polarity effect on the temperature dependence of the leakage current in TiN/HfO2/SiO2/Si capacitors is reported. A model is proposed to explain these experimental results that combines tunneling through the stack and Frenkel–Poole hopping in the HfO2 layer, depending on the value of the gate voltage. It is shown that the polarity effect most probably results from the anisotropy of the band diagram of the HfO2/SiO2 stack, as well as from the location of the shallow traps with respect to the conduction band of the HfO2 layer. Comparison of the model with the experimental results allows an estimate of the trap depth to be between 0.5 and 0.8 eV.

Marc Heyns

Papers

Bandgap opening in oxygen plasma-treated graphene.

Effective electrical passivation of Ge(100) for high-k gate dielectric layers using germanium oxide

Determination of tunnelling parameters in ultra-thin oxide layer poly-Si/SiO2/Si structures

Ultimate Scaling of CMOS Logic Devices with Ge and III–V Materials

Polarity effect on the temperature dependence of leakage current through HfO2/SiO2 gate dielectric stacks