Showing papers in "Solid-state Electronics in 1995"
TL;DR: In this article, the electron tunnelling in device grade ultra-thin 3-6 nm n + poly-Si/SiO 2 /n-Si structures has been analyzed.
Abstract: In this work the electron tunnelling in device grade ultra-thin 3–6 nm n + poly-Si/SiO 2 /n-Si structures has been analysed. The well known analytic expression for the Fowler-Nordheim tunnelling current was adapted to include the case of direct tunnelling of electrons, which becomes important for oxide layers thinner than 4.5 nm. For these ultra-thin oxide MOS structures it is necessary to take the band bending in the Si substrate and in the poly-Si layer into account to determine the oxide electrical field strength and to derive the tunnelling parameters of the measured current-voltage characteristic. A method is explained to derive the tunnel barrier height φ s and the effective mass of the tunnelling electron m ox from the experimental tunnel current characteristics. It is shown that both the direct tunnelling and the Fowler-Nordheim tunnelling current can be quantitatively explained by a WKB approximation using m ox as the single fitting parameter.
256 citations
TL;DR: The fabrication and characteristics of a number of the thin-film solar cell structures are discussed with emphasis on the thin film CdS CdTe solar cell in this paper, where the use of ZnO, ZnSe, and Cd1 − xZnxS as the window and use of CdTE and Cc 1 − x ZnxTe as the absorber are reviewed.
Abstract: With the exception of HgSe and HgTe, II–VI compounds are direct gap semiconductors with sharp optical absorption edge and large absorption coefficients at above bandgap wavelengths. Device quality polycrystalline films of II–VI compounds can be prepared from inexpensive raw materials by a number of low-cost methods. They are well-suited for thin film solar cells and provide an economically viable approach to the terrestrial utilization of solar energy. Thin film II–VI solar cells are usually of the heterojunction type consisting of a high bandgap window (or collector) and a lower bandgap absorber. The grain boundary effects in polycrystalline II–VI films are considerably less pronounced than those in III–V films and can be passivated, at least partially, by chemical treatment. The use of CdS, ZnO, ZnSe and Cd1 − xZnxS as the window and the use of CdTe and Cd1 − xZnxTe as the absorber are reviewed in this paper. The fabrication and characteristics of a number of the thin film solar cell structures are discussed with emphasis on the thin film CdS CdTe solar cell.
185 citations
TL;DR: In this paper, the luminescence properties of III-V semiconductors doped with Er atoms have been investigated and compared with those of Er-doped electroluminescent devices.
Abstract: Optoelectronic materials doped with Er atoms are receiving widespread attentions due to their impact on optical communication systems operating at 1.54 μm. Optical amplifiers based on Er-doped fibers have demonstrated major improvements in link distance, data rates and reduced needs for signal regeneration. III–V semiconductors doped with Er offer the prospect of very stable, temperature-insensitive, laser diodes emitting at 1.54 μm. This paper provides a review of the luminescence characteristics of III–V semiconductors doped with Er atoms. Aspects of Er incorporation in the III–V crystal host, photoluminescence properties, and prototype electroluminescent devices are addressed. Details of some of the first observations of photoluminescence of Er atoms in III–V nitride semiconductors, in particular GaN epilayers, are discussed. The GaN epilayers were optically excited using an argon-ion laser and spectra, centered at 1.54 μm, were observed at 6, 77 and 300 K. The spectra display many of the allowed transitions typical of the Er 3+ configuration and are nearly as intense at room temperature as at 77K. This result indicates that the wide bandgap III–V semiconductors may be ideal host materials for Er-doped electroluminescent devices.
112 citations
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TL;DR: SiGe is just on an upswing and outstanding performance was even demonstrated, e.g. high frequencies above 100 GHz, low noise below 0.5 dB at 2 GHz, high transconductances around 400 mS/mm as discussed by the authors.
Abstract: SiGe is just on an upswing. Attractive potentials can be foreseen and outstanding performance was even demonstrated, e.g. high frequencies above 100 GHz, low noise below 0.5 dB at 2 GHz, high transconductances around 400 mS/mm. A further driving force for the growing engagement with SiGe is its basic compatibility to standard Si-technology. Though most of the results stem from discrete devices SiGe is already going to be produced. The first devices will be SiGe-heterobipolar transistors (HBT). Targeted applications are converters or mobile communication systems. The status of our devices is reviewed here. In long term the SiGe hetero fieldeffect transistor (HFET) will become another candidate creating a new advanced generation in mainstream CMOS, s.c. SiGe Hetero CMOS (HCMOS). Our status of SiGe HFETs and its potential for HCMOS is presented also.
97 citations
TL;DR: In this paper, the application of the Kirchhoff transformation to the thermal analysis of semiconductor devices with temperature-dependent and piecewise inhomogeneous thermal conductivity is discussed. But the authors do not consider the case where the ratio of thermal conductivities is temperature independent, unless the apparent temperature is continuous.
Abstract: The paper presents a discussion on the application of the Kirchhoff transformation to the thermal analysis of semiconductor devices with temperature-dependent and piecewise inhomogeneous thermal conductivity. The Kirchhoff transformation is shown to generally reduce the problem to the solution of the linear heat equation with nonlinear jump conditions on the apparent temperature across subdomains, unless the ratio of the thermal conductivities is temperature independent, in which case the apparent temperature is continuous. In many practical cases, the temperature dependence of the thermal conductivity can be approximated in all subdomains so as to enforce this condition; one and two-dimensional examples are discussed to show that in realistic configurations (devices with metal heat sinks, multilayered structures made of different semiconductors) the error thereby introduced is acceptably low.
91 citations
TL;DR: A methodology to verify the robustness of the test structures is described and a set of grid specifications was generated for simulation accuracy and computational efficiency of a device simulation program.
Abstract: This paper describes a quantitative methodology for the selection of simulation space and the generation of MOSFET mesh for two-dimensional device simulation Simple mathematical expressions for the selection of two-dimensional device geometries are presented A set of grid specifications was generated for simulation accuracy and computational efficiency of a device simulation program These grid specifications were used in conjunction with the grid generation algorithm in the device simulation program MEDICI to generate two-dimensional nMOSFET test structures of different channel lengths A methodology to verify the robustness of the test structures is also described
90 citations
TL;DR: In this paper, a new rectifier structure, called Trench MOS Barrier Schottky (TMBS) rectifier, is proposed and demonstrated by modeling and fabrication to have excellent characteristics.
Abstract: A new rectifier structure, called Trench MOS Barrier Schottky (TMBS) rectifier, is proposed and demonstrated by modeling and fabrication to have excellent characteristics. Two-dimensional numerical simulations have demonstrated coupling between the charge in the N − drift region and the metal on the trench sidewalls resulting in an improved electric field distribution. For epitaxial layer doping of 1 × 10 17 cm −3 , simulations show that break-down voltages of three times the plane parallel breakdown can be achieved with low leakage current. The measured on-state voltage drops for the devices fabricated using 0.5 μm technology at 60 and 300 A/cm 2 were 0.2 and 0.28 V, respectively. Due to smaller drift region resistances, TMBS rectifiers can be operated at large current densities (∼ 300 A/cm 2 ) resulting in small evice sizes.
79 citations
TL;DR: In this paper, a simple parameter extraction technique is presented for ultra-thin oxide MOSFETs based on a suitable MOS-FET mobility model and extracts threshold voltage (V t ), mobility ( μ 0 ), and two degradation parameters θ 1 and θ 2.
Abstract: A simple parameter extraction technique is presented for ultra-thin oxide MOSFETs. The technique is based on a suitable MOSFET mobility model and extracts threshold voltage ( V t ), mobility ( μ 0 ), and two mobility degradation parameters θ 1 and θ 2 . It has been found that the extracted parameters accurately describe the measured current voltage characteristics for strong inversion.
78 citations
TL;DR: In this paper, a long-channel MOSFET model is presented where the drain current, total charges and small-signal parameters for quasi-static operation are very simple functions of the inversion charge densities at the channel boundaries.
Abstract: This paper presents a long-channel MOSFET model wherein the drain current, total charges and small-signal parameters for quasi-static operation are very simple functions of the inversion charge densities at the channel boundaries The inversion charge densities, in turn, are formulated as explicit continuous functions of the terminal voltages, with continuous first order derivatives, resulting in an explicit MOSFET model valid in the whole inversion region Physical properties, such as the symmetry of the transistor with respect to source and drain are carefully observed in order to achieve a proper prediction of the device behavior The proposed model contains only the classical parameters of the MOSFET theory
66 citations
TL;DR: In this article, the authors derived a phenomenological model for the failure rate of high voltage power semiconductors and showed that the model can be used to quantify the safe operating conditions with respect to the cosmic ray failure mode.
Abstract: Recently it was discovered that cosmic rays can induce failures in large area, high voltage power semiconductors. The effect is of considerable practical significance and has caused a series of equipment malfunctions in the field. We show that earlier attempts to model the physical process of failure are inadequate and introduce a new model. From the new model we derive a phenomenological law for the failure rate as a function of simple design parameters. The law has only two adjustable parameters and the parameters have a simple physical interpretation. In particular the parameter which describes the slope of the extrapolation curve from test to field conditions can be calculated from first principles and shows good agreement with the experimentally found value. This gives high confidence in the validity of the extrapolation law. We give mathematical expressions and diagrams to quantify the safe operating conditions with respect to the cosmic ray failure mode for all high voltage power devices. This allows the user to design reliable power electronic equipment and the semiconductor manufacturer to design devices virtually immune against this failure mode.
65 citations
TL;DR: In this article, a new physical model for the mechanisms governing the observed resistance reduction and recovery is presented, which views the grain boundary as a defect-laden transition region between grains of different crystal orientation.
Abstract: The resistivity of polysilicon films are dramatically altered when subjected to high current densities via a technique known as pulse current trimming[1,2,8,10]. A new physical model for the mechanisms governing the observed resistance reduction and recovery is presented. The model views the grain boundary as a defect-laden transition region between grains of different crystal orientation. Severe temperatures induced in the polysilicon film during pulse current trimming lead to non-reversible restructuring of the grain boundary. This produces a more coherent transition between grains and a reduction of scattering centers leading to increased carrier mobility without a significant increase in free carrier concentration. The effect is aided by “liquid phase” segregation of dopant atoms at the grain boundaries which provides a smaller, reversible component to the resistance change. Results of the first comprehensive reliability study show the trimmed resistors to be exceptionally robust. Finally, circuit design considerations for manufacturability and ESD tolerance are presented.
TL;DR: In this article, the transport properties of holes in Si1 − xGex channels were studied with a Monte Carlo technique, showing that the hole velocity is much larger than that of compressive or unstrained cases, especially at low fields.
Abstract: The transport properties of holes in Si1 − xGex are studied with a Monte Carlo technique. If the strain is applied to the Si1 − xGex channel, it raises the degeneracy of the heavy-hole and light-hole bands: for compressive strain, the heavy-hole band lies at a higher energy than the light-hole band, while for tensile strain, the order reverses, although it is technologically uncertain how to realize the tensile case at this stage. The transport properties are essentially the same for the unstrained and compressive cases, since most holes are in the heavy-hole band over the entire field range of interest. Although the overshot is negligible, the hole velocity is still higher than that of Si, reflecting the excellent hole transport properties in Ge. In the tensile case, we have observed a negative differential resistance region for 5 × 102–5 × 103V/cm, due to the hole transfer from the light-hole band to the heavy-hole band. The velocity is much larger than that of compressive or unstrained cases, especially at low fields. Because of the small effective mass in the light-hole band, the velocity overshoot is significant in the tensile strain case. These results provide motivation to try to realize the tensile strain case technologically.
IMEC1
TL;DR: In this article, the excess noise behavior of both non-silicided and silicided p-and n-channel MOSTs, biased in the ohmic region, has been investigated.
Abstract: The excess noise behaviour of silicided and non-silicided p- and n-channel MOSTs, biased in the ohmic region, has been investigated. Only a minor difference in noise and series resistance could be seen for the n-channel MOSTs. However, the noise in the non-silicided p-MOSTs was dominated by the noise in the series resistance. The series resistance for the non-silicided p-MOSTs was more than four times higher than for the silicided p-MOSTs. A modified model for the 1/f noise equivalent circuit is proposed, showing good agreement with experimental results and explaining the observed trend SId∝Idm with 0 < m < 4. The classical geometry dependence of the current noise in MOSTs is only valid if the noise in the series resistance is negligible.
TL;DR: In this paper, the effect of carrier concentration and compensation on the electron mobilities in GaSb at 300 and 77 K was investigated, and it was found that the correlation for the heavily doped bulk samples are good while for the lighter doped thin epilayers, the calculated mobilities are at least 20% higher.
Abstract: The effect of carrier concentration and compensation on the electron mobilities in GaSb at 300 and 77 K are investigated. Since the energy of the L band minima relative to the Γ band minima in GaSb is reported to range from 0.075 to 0.09 eV, electrons are present in significant amount in both the Γ and L bands at about 150 K and above. Thus, in addition to the impurities and phonons scattering, non-equivalent and equivalent intervalley scattering in both conduction bands are also included in the 300 K calculation. To compare the calculated Hall mobility with the various 300 K experimental data consistently, the electron mobilities in the Γ and L bands are combined using a two band model. This is because experimental electron Hall mobility and electron concentration determined above 150 K are weighted averages of the true values in the two conduction bands. It is found that the correlation for the heavily doped bulk samples are good while for the lighter doped thin epilayers, the calculated mobilities are at least 20% higher. We attribute this to several effects present in the real samples and the growth conditions which are not taken into consideration in the calculations. The 77 K highly doped bulk and best MBE data are also found to correlate reasonably well with the calculated values. We have also numerically fitted all the electron mobilities calculated to a l th polynomial in carrier concentration which may facilitate device modelling.
TL;DR: In this article, the authors investigated self-heating effects from room down to near liquid helium temperatures in fully depleted N channel thin film SIMOX MOS devices and derived a procedure for the determination of the thermal resistance and the device temperature rise directly from the static output characteristics.
Abstract: Self-heating effects are investigated from room down to near liquid helium temperatures in fully depleted N channel thin film SIMOX MOS devices. In addition, a simple theoretical analysis of the self-heating effect is conducted. A procedure for the determination of the thermal resistance and the device temperature rise directly from the static output characteristics is derived. In order to validate this approach, direct self-heating transient measurements are also carried out.
TL;DR: In this article, the influence of the gate leakage current on the noise performance of MESFETs and MODFET was investigated and both a simple analytical model and a more realistic numerical model have been developed.
Abstract: In this paper, the influence of the gate leakage current on the noise performance of MESFETs and MODFETs is investigated. Both a simple analytical model and a more realistic numerical model have been developed. It is shown that the noise performance is strongly dependent on the gate leakage current value, especially at low frequency. The theoretical results are discussed and compared with experimental ones.
TL;DR: In this article, 12 different elements used for doping or isolation were implanted into GaN (and selected species into AlN and InN), and the resulting range parameters were measured by secondary ion mass spectrometry.
Abstract: Twelve different elements used for doping or isolation were implanted into GaN (and selected species into AlN and InN), and the resulting range parameters were measured by secondary ion mass spectrometry. For lighter elements such as Be, F and H, the agreement between experimental range and range straggle determined using a Pearson IV computer fitting routine and those predicted by TRIM 92 calculations was good, but for heavier elements such as Ge and Se, the discrepancy can be as much as a factor of two in range. There was little redistribution of any of the investigated species up to 700°C, except for 2H in AlN and S in GaN. Elements such as F and Be, which are generally rapid diffusers in III–V compounds, do not display any redistribution in GaN for temperatures up to 800°C.
TL;DR: In this paper, the behavior of anomalous off-current in polysilicon thin film transistors (polysilicon TFTs) has been investigated over a wide range of temperatures, namely 180-400 K, and the authors have identified a pure trap-to-band tunnelling mechanism and deduced, by a simple procedure, the physical constants.
Abstract: The anomalous off-current (I off ) in polysilicon thin film transistors (polysilicon TFTs) is one of the major problems preventing a wide use of these devices in active matrix liquid crystal displays. While previous investigations have focused on the temperature range above 300 K, in this study we have investigated the behaviour of I off over a wide range of temperatures, namely 180–400 K. The data have been analysed by combining 2D simulations and existing analytic models. By this approach we have identified a pure trap-to-band tunnelling mechanism in polysilicon TFTs and deduced, by a simple procedure, the physical constants. The temperature and bias dependence of the off-current has been explained quantitatively in terms of phonon-assisted tunnelling. The number of generating centres, the dominant trap energy and the thermal capture cross section are deduced from this analysis.
TL;DR: In this article, a model for the quantized accumulation layer based on the union of a two-dimensional electron gas contained in several energy subbands and a threedimensional electron-gas distributed in a continuum of energy levels is proposed.
Abstract: A model is proposed for the quantized accumulation layer based on the union of a two-dimensional electron gas contained in several energy subbands and a three-dimensional electron-gas distributed in a continuum of energy levels. The model is valid for both low and high temperatures and is formulated to allow the incorporation of quantum effects in a simulation based on classical models. It therefore permits the study of the different operation regions of a metal-insulator-semiconductor structure with continuity between them. Equations of the model are detailed as well as the solution procedure. The validity of the model is discussed and results obtained from both the quantum and classical model are compared. Capacitance curves obtained with both models are also compared to experimental ones.
TL;DR: In this article, an analytical drain current model considering impact ionization and parasitic BJT effects, an energy balance equation, and lattice thermal effect for short-channel fully-depleted ultrathin silicon-on-insulator NMOS devices is presented.
Abstract: This paper presents an analytical drain current model considering the impact ionization and parasitic BJT effects, an energy balance equation, and lattice thermal effect for short-channel fully-depleted ultrathin silicon-on-insulator NMOS devices. Supported by the experimental data, the analytical model shows a good prediction of the drain current characteristics. According to the model, in the saturation region at small V G , the impact ionization and parasitic BJT effects are important. At large V G , the lattice thermal effect is important.
TL;DR: In this article, a new generalized formulation of the Boltzmann equation is proposed, which uses a spherical harmonic expansion to arbitrarily high order to reduce the dimensionality of the problem and facilitates analytical evaluation of the collision integral.
Abstract: MOSFET simulation is performed by direct solution of the Boltzmann equation. The method is based on a new generalized formulation of the Boltzmann equation which uses a spherical harmonic expansion to arbitrarily high order. The new formulation takes advantage of special properties of spherical harmonics to reduce the dimensionality of the problem, as well as facilitates analytical evaluation of the collision integral. Space independent calculations were performed demonstrating the technique to 20th order accuracy for a multi-band dispersion relation. Two-dimensional MOSFET simulations provide the distribution function for the entire device, as well as average quantities including electron temperature, average velocity and carrier concentration.
TL;DR: In this paper, different 1D analytical models for the potential distribution across the silicon film of a double-gate nMOS/SOI device are proposed and compared, based on a double integration of Poisson's equation, which contains both the dopant impurity charges and an approximation of the minority carrier concentration.
Abstract: Different 1D analytical models for the potential distribution across the silicon film of a double-gate nMOS/SOI device are proposed and compared. Models are based on a double integration of Poisson's equation, which contains both the dopant impurity charges and an approximation of the minority carrier concentration. With the best approximation, a model valid from the subthreshold to the strong inversion region is obtained. It is especially useful in the moderate inversion region where classical models fail. Analytical expressions of the drain current and transconductance are provided at low V-D. The threshold voltage is extracted by the maximum transconductance change method. Good agreement with numerical simulations is achieved.
TL;DR: In this article, a plan-view TEM study has been made of the distribution, geometry and the time-dependent annealing behavior of type II dislocation loops introduced by 1 × 1015/cm2 50 keV Si+ implantation into silicon.
Abstract: A plan-view TEM study has been made of the distribution, geometry and the time-dependent annealing behavior of type II (end of range) dislocation loops introduced by 1 × 1015/cm2 50 keV Si+ implantation into silicon. The size and density distributions of the loops have been quantitatively analyzed, and loop growth behavior has been compared with that predicted by a bulk-diffusion mechanism and by a glide and self-climb mechanism. It has been shown that the loop growth rate is approximately constant for each annealing temperature (700–1000°C) and that the growth is governed by the bulk-diffusion mechanism. Regions of growth and shrinkage have been investigated for different annealing temperatures in terms of interstitial supersaturation and the critical loop growth radius. The activation energy for loop growth is determined to be 1.0 ± 0.2 eV from the Arrhenius plot of loop growth rate versus the reciprocal of annealing temperature.
TL;DR: In this paper, a non-quasi-static model for the small-signal behavior of short channel MOSFETs is presented, and the effects of approximating the exact analytical solutions are discussed.
Abstract: A new, analytical Non-Quasi-Static model, in terms of admittance parameters, for the small-signal behaviour of short channel MOSFETs is presented. The relevant short channel effects are included explicitly in the derivation of the model. The effects of approximating the exact analytical solutions are discussed. A new approximation for extremely high frequencies is proposed. The model is consistent with previously published low frequency models and shows good agreement with 2D device simulations and measurements. Finally the influence of parasitics is illustrated.
TL;DR: In this article, two methods are presented for reducing the noise in polysilicon emitter bipolar transistors, one involves the use of an interface anneal, which has the effect of breaking up the interfacial layer.
Abstract: Polysilicon emitter bipolar transistors are becoming common in modern bipolar and BICMOS processes. For analogue applications, it is important to understand the noise phenomena as well as the more familiar circuit behaviour. In this paper we report on experimental studies of the 1 f noise in these transistors. Firstly, we show how the noise depends strongly on the type of interfacial oxide layer at the polysilicon/silicon interface. For example, the 10 Hz noise of a device with an RCA interfacial oxide layer is approximately four times higher than that of a comparable device with an HF interfacial layer (i.e. thinner and with poorer integrity). The dependence is explained by means of a simple mathematical model of the 1 f noise generation, based on the fluctuation in the occupancy level of individual traps in the thin oxide at the polysilicon/silicon interface. Two methods are presented for reducing the noise in polysilicon emitter bipolar transistors. The first involves the use of an interface anneal, which has the effect of breaking up the interfacial layer. This method reduces the 10 Hz noise by a factor of approximately four, but also dramatically reduces the current gain. The second method involves a fluorine implantation into the polysilicon immediately after the emitter implant. This reduces the 10Hz noise by a factor of approximately three, but does not significantly alter the current gain. This is explained by the action of the fluorine in passivating surface states in the interfacial oxide layer. It is also shown how the physical emitter structure can influence the noise. Both the effective depth of the emitter-base junction and the periphery-to-area ratio have an influence on the noise through the varying significance of surface recombination currents.
TL;DR: In this article, the performance of pseudomorphic high electron mobility transistors (HEMTs) and InP pseudomorphic HEMTs were compared to the MESFETs.
Abstract: Recent expansion in the demand for high frequency applications requires new transistors with better performance than the MESFETs, especially in the upper-microwave and mm-wave frequency ranges. To realize better transistors than the MESFET by utilizing features of the heterostructure, high electron mobility transistors (HEMTs) and heterojunction bipolar transistors (HBTs) are being developed. GaAs pseudomorphic HEMTs (PHEMTs) are currently the main type of low noise transistors being used in various microwave and mm-wave systems. Very low noise figures of 1.5 dB at 60 GHz and 2.1 dB at 94 GHz are achieved with GaAs PHEMTs. Furthermore, InP HEMTs, with better noise performance than GaAs PHEMTs, are being developed to replace the latter. State of the art noise figures for InP HEMTs are, for example, 0.8 dB at 60 GHz and 1.2 dB at 94 GHz. GaAs based power HEMTs show higher efficiencies than competing MESFETs for frequencies over 10 GHz, and are comparable to them below 10 GHz. In the higher frequency range, the state of the art in the output power of HEMTs gives a −6 dB/octave line connecting 4W at 20 GHz and 0.1 W at 100 GHz. As there are still reliability problems yet to be solved with the low noise InP HEMTs and the power HEMTs, further study of degradation mechanisms in AlInAs/InGaAs/InP systems, r.f. operation testing of really high power HEMTs, systematic reliable data, etc. would be necessary for them to be accepted as having been established to be reliable devices.
TL;DR: The thermal generation component of polycrystalline silicon TFTs off-current is analyzed experimentally and theoretically in this article, where hot hole injection, obtained by stressing the device at negative gate voltage and high source-drain voltage, has been used to reduce the electric field at the drain junction.
Abstract: The thermal generation component of polycrystalline silicon TFTs off-current is analysed experimentally and theoretically. In order to minimize the field-enhanced component of the leakage current, hot-hole injection, obtained by stressing the device at negative gate voltage and high source-drain voltage, has been used to reduce the electric field at the drain junction. After stress, the electrical characteristics in the off-regime are channel length independent and do not depend on gate voltage. This behaviour has been associated with the thermal generation-recombination processes occurring at the drain junction. Two-dimensional numerical simulations have been carried out with the program HFIELD, which has been modified to take into account the presence of gap states in polysilicon, and to incorporate the thermal generation-recombination processes by using the Shockley-Read-Hall statistics. Numerical simulations confirm that the generation occurs in the depletion region of the drain junction. The experimental I d - V ds characteristics measured at negative gate voltage have been compared with the calculated characteristics. The best fit with the experimental data was obtained only by using a rather short carrier lifetime (10 −12 s). The simulations indicate that a decrease of the density of states produces a lower off-current owing to a longer carrier lifetime and to a reduction of the drain junction depletion layer.