Showing papers by "Michael Mikulla published in 2009"

Metamorphic HEMT technology for low-noise applications

Abstract: Different noise sources in HEMTs are discussed, and state-of-the-art low-noise amplifiers based on the Fraunhofer IAF 100 nm and 50 nm gate length metamorphic HEMT (mHEMT) process are presented. These mHEMT technology feature an extrinsic ƒ T of 220 / 375 GHz and an extrinsic transconduction g m, max of 1300 / 1800 mS/mm. By using the 50 nm technology several low-noise amplifier MMICs were realized. A small signal gain of 21 dB and a noise figure of 1.9 dB was measured in the frequency range between 80 and 100 GHz at ambient temperature. To investigate the low temperature behaviour of the 100 nm technology, single 4 * 40 µm mHEMTs were integrated in hybrid 4 – 8 GHz (Chalmers) and 16 – 26 GHz (Yebes) amplifiers. At cryogenic temperatures noise temperatures of 3 K at 5 GHz and 12 K at 22 GHz were achieved.

GaN HEMT and MMIC development at Fraunhofer IAF: performance and reliability

Abstract: We present a systematic study of epitaxial growth, processing technology, device performance and reliability of our GaN HEMTs and MMICs manufactured on 3 inch SiC substrates. Epitaxy and processing are optimized for both performance and reliability. The deposition of the AlGaN/GaN HEMT epitaxial structures is designed for low background carrier concentration and a low trap density in order to simultaneously achieve a high buffer isolation and low DC to RF dispersion. Device fabrication is performed using standard processing techniques involving both electron-beam and stepper lithography. Gate lengths of 250 nm and 500 nm are employed for 10 GHz and 2 GHz applications, respectively. The developed HEMTs demonstrate excellent high-voltage stability, high power performance and large power added efficiencies. Devices exhibit two-terminal gate―drain breakdown voltages in excess of 160 V (current criterion 1 mA/mm) across the entire 3 inch wafer with parasitic gate and drain currents well below 1 mA/mm when biased up to 80 V drain bias under pinch-off conditions. Load-Pull measurements at 2 GHz on 800 μm gate width devices return a well-behaved relationship between bias-voltage and output-power as well as power-added- efficiencies beyond 60% up to U DS = 100 V. For a drain bias of 100 V an output-power-density around 22 W/mm with 26 dB linear gain is obtained. On large devices (32 mm gate width packaged in industry-standard ceramic packages) an output power beyond 100 W is achieved with a PAE above 50% and a linear gain around 15 dB. Dual-stage MMICs in microstrip transmission line technology yield a power added efficiency of 40% at 8.56 GHz for a power level of 11 W. A single-stage MMIC yields a PAE of 46% with 7 W of output power at V DS = 28 V. Reliability is tested on HEMT devices having a gate periphery of 8 x 60 μm at an operating bias of 50 V under both DC and RF conditions. About 10% drain-current change under DC-stress (50 mA/mm) is observed af- ter more than 1000 h of operation with an extrapolated drain- current degradation below 20% after 200000 h (more than 20 years) of operation. Under RF stress (2 GHz, 1 dB compression) the observed change in output power density is be- low 0.2 dB after more than 1000 h.

Design of highly-efficient GaN X-band-power-amplifier MMICs

Abstract: This paper describes the design and realization of efficient GaN/AlGaN MMICs for X-band frequencies (8–12 GHz) in microstrip- transmission-line-technology on 3-inch s.i.SiC substrates. Four dual-stage MMICs are designed and realized based on different bandwidth requirements between 1GHz and 3 GHz with output power levels of 15–20W at X-band. After optimization of field-plate architectures and driver stage size, a maximum PAE of ≥40% is achieved between 8.5-10 GHz with a maximum output power of 19–23W, and an associated power gain of 17 dB. A broadband device with 3 GHz bandwidth reaches ≥35% of PAE between 8 and 11 GHz. A 1mm test chip of the same technology supports a VSWR-ratio test of at least 4:1 at P −1 dB power compression and 10 GHz.

X-band T/R-module front-end based on GaN MMICs

Abstract: Amplifiers for the next generation of T/R modules in future active array antennas are realized as monolithically integrated circuits (MMIC) on the basis of novel AlGaN/GaN (is a chemical material description) high electron mobility transistor (HEMT) structures. Both low-noise and power amplifiers are designed for X-band frequencies. The MMICs are designed, simulated, and fabricated using a novel via-hole microstrip technology. Output power levels of 6.8 W (38 dBm) for the driver amplifier (DA) and 20 W (43 dBm) for the high-power amplifier (HPA) are measured. The measured noise figure of the low-noise amplifier (LNA) is in the range of 1.5 dB. A T/R-module front-end with mounted GaN MMICs is designed based on a multi-layer low-temperature cofired ceramic technology (LTCC).

Design of X-Band GaN MMICs using field plates

Abstract: Two field plate variants of AlGaN/GaN-HEMTs with and without source-connected field plate (“shield”) were analyzed for the design of efficient High-Power-Amplifier MMICs operating at X-Band frequencies. This paper presents the design and realization of three dual-stage microstrip MMICs using different device variants for narrowband and broadband applications. Two narrowband HPAs, using GaN HEMTs with and without shield, achieve a maximum output power and PAE of 20 W and ≫39 %, respectively. A broadband amplifier containing GaN HEMTs without shield reaches a simulated output power beyond 12 W with ≪30 % PAE over 9–11 GHz.

Reliability of AlGaN/GaN HEMTs under DC- and RF-operation

Abstract: In this work, device reliability under DC- and RF-operation at high temperatures ranging from 140°C to 200°C and at high drain voltage of 50 V has been achieved by improving the gate metal processing technology. It will be shown by long term stress tests that the gate processing technology is the key to improve the stability of the gate leakage current. The short term drain voltage robustness under off state condition has been examined by a DC-voltage-step-stress test. At the maximum drain voltage of 130 V the gate and drain current densities remain below 0.1 mA/mm. First RF stress test of a 2.4 mm power FETs at 2 GHz also shows little degradation.

Device and Design Optimization for AlGaN/GaN X-Band-Power-Amplifiers with High Efficiency

Abstract: The design, realization and characterization of dual-stage X-band high-power and highly-efficient monolithic microwave integrated circuit (MMIC) power amplifiers (PAs) with AlGaN/GaN high electronic mobility transistors (HEMTs) is presented. These high power amplifiers (HPAs) are based on a precise investigation of circuit-relevant HEMT behavior using two different field-plate variants and its effects on PA performance as well as optimization of HPA driver stage size which also has a deep impact on the entire HPA. Two broadband (3 GHz) MMICs with different field-plate variants and two narrowband (1 GHz) PAs with different driver- to final-stage gate-width ratio are realized with a maximum output power of 19-23 W, a maximum power-added efficiency (PAE) of ≥40%, and an associated power gain of 17 dB at X-band. Furthermore, two 1 mm test transistors of the same technology with the mentioned field-plate variants and a 1 mm test MMIC support VSWR-ratio tests of 6:1 and 4:1, respectively.

Development of AlGaN/GaN HEMTs with efficiencies above 60% up to 100 V for next generation mobile communication 100 W power bars

Abstract: We present a systematic study of epitaxial growth, processing technology, device performance and reliability of our GaN HEMTs manufactured on 3-inch SiC substrates. Epitaxy and processing are optimized for both performance and reliability. The deposition of the AlGaN/GaN HEMT epitaxial structures is designed for both low background carrier concentration and a low trap density in order to simultaneously achieve a high buffer isolation and low DC to RF dispersion. Device fabrication is performed using standard processing techniques involving both electron-beam and stepper lithography. The developed HEMTs demonstrate excellent high-voltage stability, high power performance and large power added efficiencies. Devices exhibit two-terminal gate-drain breakdown voltages in excess of 160 V (current criterion 1 mA/mm) across the entire 3-inch wafer with parasitic gate and drain currents well below 1 mA/mm when biased up to 80 V drain bias under pinch-off conditions. Load-Pull measurements at 2 GHz on 800 μm gate periphery devices return both a well-behaved relationship between bias-voltage and output-power as well as power-added-efficiencies beyond 60% up to UDS = 100 V. For a drain bias of 100 V an output-power-density around 22 W/mm with 26 dB linear gain is obtained. On large periphery devices (32 mm gate width packaged in industry-standard ceramic packages) an output power beyond 100 W is achieved with a PAE above 50% and a linear gain around 15 dB. Reliability is tested on devices having a gate periphery of 8×60 μm at an operating bias of 50 V under both DC and RF conditions. About 10% drain-current change under DC-stress (50 mA/mm) is observed after more than 1000 h of operation with an extrapolated drain-current degradation below 20% after 200,000 h (more than 20 years) of operation. Under RF stress (2 GHz, 1 dB compression) the observed change in output power density is below 0.2 dB after more than 1000 h. (© 2009 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)