There is, I think, something ethereal about i —the square root of minus one. I remember first hearing about it at school. It seemed an odd beast at that time—an intruder hovering on the edge of reality.

Usually familiarity dulls this sense of the bizarre, but in the case of i it was the reverse: over the years the sense of its surreal nature intensified. It seemed that it was impossible to write mathematics that described the real world in …

I and i

Probability Distributions.- Linear Models for Regression.- Linear Models for Classification.- Neural Networks.- Kernel Methods.- Sparse Kernel Machines.- Graphical Models.- Mixture Models and EM.- Approximate Inference.- Sampling Methods.- Continuous Latent Variables.- Sequential Data.- Combining Models.

Pattern Recognition and Machine Learning

(1991). Applied Linear Regression Models. Journal of Quality Technology: Vol. 23, No. 1, pp. 76-77.

Applied Linear Regression Models

IEEE transactions on computer-aided design of integrated circuits and systems : a publication of the IEEE Circuits and Systems Society

Micromachining and micro-electromechanical system (MEMS) technologies can be used to produce complex structures, devices and systems on the scale of micrometers. Initially micromachining techniques were borrowed directly from the integrated circuit (IC) industry, but now many unique MEMS-specific micromachining processes are being developed. In MEMS, a wide variety of transduction mechanisms can be used to convert real-world signals from one form of energy to another, thereby enabling many different microsensors, microactuators and microsystems. Despite only partial standardization and a maturing MEMS CAD technology foundation, complex and sophisticated MEMS are being produced. The integration of ICs with MEMS can improve performance, but at the price of higher development costs, greater complexity and a longer development time. A growing appreciation for the potential impact of MEMS has prompted many efforts to commercialize a wide variety of novel MEMS products. In addition, MEMS are well suited for the needs of space exploration and thus will play an increasingly large role in future missions to the space station, Mars and beyond. (Some figures in this article are in colour only in the electronic version)

https://iopscience.iop.org/article/10.1088/0964-1726/10/6/301/pdf

Microelectromechanical systems (MEMS):fabrication, design and applications

Physically Unclonable Functions (PUFs) are structures with many applications, including device authentication, identification, and cryptographic key generation. In this paper we propose a new PUF, called SCAN-PUF, based on scan-chain power-up states. We argue that scan chains have multiple characteristics that make them uniquely suited as a low-cost PUF. We present results from test chips fabricated in a 65nm bulk CMOS process in support of these claims. While approximately 20% of the total population of scan elements are unreliable across temperature variations, we find that simple unanimous selection schemes can result in mean error rates of less than 0.1% for the selected populations across all measurements collected.

SCAN-PUF: A low overhead Physically Unclonable Function from scan chain power-up states

Hardware implementations of deep neural networks (DNNs) have been adopted in many systems because of their higher classification speed. However, while they may be characterized by better accuracy, larger DNNs require significant energy and area, thereby limiting their wide adoption. The energy consumption of DNNs is driven by both memory accesses and computation. Binarized neural networks (BNNs), as a tradeoff between accuracy and energy consumption, can achieve great energy reduction and have good accuracy for large DNNs due to their regularization effect. However, BNNs show poor accuracy when a smaller DNN configuration is adopted. In this article, we propose a new DNN architecture, LightNN, which replaces the multiplications to one shift or a constrained number of shifts and adds. Our theoretical analysis for LightNNs shows that their accuracy is maintained while dramatically reducing storage and energy requirements. For a fixed DNN configuration, LightNNs have better accuracy at a slight energy increase than BNNs, yet are more energy efficient with only slightly less accuracy than conventional DNNs. Therefore, LightNNs provide more options for hardware designers to trade off accuracy and energy. Moreover, for large DNN configurations, LightNNs have a regularization effect, making them better in accuracy than conventional DNNs. These conclusions are verified by experiment using the MNIST and CIFAR-10 datasets for different DNN configurations. Our FPGA implementation for conventional DNNs and LightNNs confirms all theoretical and simulation results and shows that LightNNs reduce latency and use fewer FPGA resources compared to conventional DNN architectures.

https://dl.acm.org/doi/pdf/10.1145/3270689

Lightening the Load with Highly Accurate Storage- and Energy-Efficient LightNNs

A method and apparatus are disclosed in which defect behavior in an integrated circuit is discovered and modeled rather than assuming defect behavior in the form of a fault. A plurality of tests are performed on an integrated circuit to produce passing and failing responses. The failing responses are examined in conjunction with circuit description data to identify fault locations. For at least certain of the fault locations, the logic-level conditions at neighboring locations which describe the behavior of a failing response are identified. Those logic level conditions are combined into a macrofault for that location. The macrofault is then validated and can be then used to identify more tests for further refining the diagnosis. Because of the rules governing abstracts, this abstract should not be used to construe the claims.

Using neighborhood functions to extract logical models of physical failures using layout based diagnosis

IEEE 1149.1, commonly known as the joint test action group (JTAG), is the standard for the test access port and the boundary-scan architecture. The JTAG is primarily utilized at the time of the integrated circuit (IC) manufacture but also in the field, giving access to internal sub-systems of the IC, or for failure analysis and debugging. Because the JTAG needs to be left intact and operational for use, it inevitably provides a "backdoor" that can be exploited to undermine the security of the chip. Potential attackers can then use the JTAG to dump critical data or reverse engineer IP cores, for example. Since an attacker will use the JTAG differently from a legitimate user, it is possible to detect the difference using machine-learning algorithms. A JTAG protection scheme, SLIC-J, is proposed to monitor user behavior and detect illegitimate accesses to the JTAG. Specifically, JTAG access is characterized using a set of specifically-defined features, and then an on-chip classifier is used to predict whether the user is legitimate or not. To validate the effectiveness of the approach, both legitimate and illegitimate JTAG accesses are simulated using the OpenSPARC T2 benchmark. The results show that the detection accuracy is 99.2%, and the escape rate is 0.8%.

Detection of illegitimate access to JTAG via statistical learning in chip

We present an efficient algorithm for identification of two-line bridges in combinational CMOS logic that narrows down the two-line bridge candidates based on tester responses for voltage tests. Due to the implicit enumeration of bridge sites, no layout extraction or precomputed stuck-at fault dictionaries are required. The bridge identification is easily refined using additional test pattern results when necessary. We present results for benchmark circuits and four common fault models (wiredAND, wired-OR, dominant, and composite), evaluate the diagnosis against other possible fault types, and summarize the quality of our results.

R.D. Blanton

Papers

SCAN-PUF: A low overhead Physically Unclonable Function from scan chain power-up states

Lightening the Load with Highly Accurate Storage- and Energy-Efficient LightNNs

Using neighborhood functions to extract logical models of physical failures using layout based diagnosis

Detection of illegitimate access to JTAG via statistical learning in chip

Progressive bridge identification