Light-Emitting Diodes. (Monographs in Electrical and Electronic Engineering.) By A. A. Bergh and P. J. Dean. Pp. viii+591. (Clarendon: Oxford; Oxford University: London, 1976.) £22.

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Light-emitting diodes

Progress in the development of tunnel field-effect transistors (TFETs) is reviewed by comparing experimental results and theoretical predictions against 16-nm FinFET CMOS technology. Experiments lag the projections, but sub-threshold swings less than 60 mV/decade are now reported in 14 TFETs. The lowest measured sub-threshold swings approaches 20 mV/decade, however, the measurements at these lowest values are not based on many points. The highest current at which sub-threshold swing below 60 mV/decade is observed is in the range 1–10 nA/ ${{\mu }}$ m. A common approach to TFET characterization is proposed to facilitate future comparisons.

Tunnel Field-Effect Transistors: State-of-the-Art

This paper combines background information about the IBM Journal of Research and Development with guidelines for the preparation of Journal manuscripts. The purpose is to acquaint authors with the Journal as a primary, professional publication and to present suggestions to ease the work of author and editor in preparing clear, concise, and useful manuscripts.

IBM journal of research and development: information for authors

Japanese Journal of Applied Physicsの創刊

A concise and factual abstract is required. The abstract should state briefly the purpose of the research, the principal results and major conclusions. An abstract is often presented separately from the article, so it must be able to stand alone. For this reason, References should be avoided, but if essential, then cite the author(s) and year(s). Also, non-standard or uncommon abbreviations should be avoided, but if essential they must be defined at their first mention in the abstract itself.

Physica. B, Condensed matter

Using an atomistic full-band quantum transport solver, we investigate the performances of vertical band-to-band tunneling FETs (TFETs) whose operation is based on the enhancement of the gate-induced drain leakage mechanism of MOSFETs, and we compare them to lateral p-i-n devices. Although the vertical TFETs offer larger tunneling areas and therefore larger on currents than their lateral counterparts, they suffer from lateral source-to-drain tunneling leakage away from the gate contact. We propose a design improvement to reduce the off current of the vertical TFETs, maintain large on currents, and provide steep subthreshold slopes.

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Leakage-Reduction Design Concepts for Low-Power Vertical Tunneling Field-Effect Transistors

With the proliferation of Li-ion batteries in smart phones, safety is the main concern and an on-line detection of battery faults is much wanting. Internal short circuit is a very critical issue that is often ascribed to be a cause of many accidents involving Li-ion batteries. A novel method that can detect the Internal short circuit in real time based on an advanced machine leaning approach, is proposed. Based on an equivalent electric circuit model, a set of features encompassing the physics of Li-ion cell with short circuit fault are identified and extracted from each charge-discharge cycle. The training feature set is generated with and without an external short-circuit resistance across the battery terminals. To emulate a real user scenario, internal short is induced by mechanical abuse. The testing feature set is generated from the battery charge-discharge data before and after the abuse. A random forest classifier is trained with the training feature set. The fault detection accuracy for the testing dataset is found to be more than 97%. The proposed algorithm does not interfere with the normal usage of the device, and the trained model can be implemented in any device for online fault detection.

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Internal short circuit detection in Li-ion batteries using supervised machine learning

Accurate state of health (SOH) estimation of rechargeable batteries is important for the safe and reliable operation of electric vehicles (EVs), smart phones, and other battery operated systems. We propose a novel method for accurate SOH estimation which does not necessarily need full charging data. Using only partial charging data during normal usage, 10 derived voltage values ([Formula: see text]) are collected. The initial [Formula: see text] point is fixed and then for every 1.5% increase in the Coulomb counting, other points are selected. The difference between the [Formula: see text] values ([Formula: see text]) and the average temperature during the charging form the feature vector at different SOH levels. The training data set is prepared by extrapolating the charging voltage curves for the complete SOH range using initial 400 cycles of data. The trained artificial neural network (ANN) based on the feature vector and SOH values can be used in any battery management system (BMS) with a time complexity of only [Formula: see text]. Less than 1% mean absolute error (MAE) for the test cases has been achieved. The proposed method has a moderate training data requirement and does not need any knowledge of previous SOH, state of charge (SOC) vs. OCV relationship, and absolute SOC value.

/pdf/an-incremental-voltage-difference-based-technique-for-online-16lvngdgvc.pdf

An Incremental Voltage Difference Based Technique for Online State of Health Estimation of Li-ion Batteries.

In this brief, the random dopant fluctuation (RDF)-induced threshold voltage ( $V_{T}$ ) variability, on current ( $I_{\mathrm {\scriptstyle ON}}$ ) variability, and $V_{T}$ mismatch in undoped channel Si gate-all-around (GAA) n-nanowire MOSFETs (n-NWFETs) are studied using coupled 3-D statistical device simulations considering quantum corrected room temperature drift-diffusion transport. The RDFs are introduced in the Si NWFET tetrahedral device grid by a 3-D atomistic Monte-Carlo technique. The RDF due to discrete random dopants located in the source (S)/drain (D) extension and channel regions of Si GAA n-NWFET are found to impact the device characteristic variability. The numerical $V_{T}$ mismatch analysis and comparison with the Si n-NWFET total $A_{VT}$ measurement data from the literature reveal that RDF still plays a significant source for device random fluctuations in undoped channel Si GAA n-NWFETs. The numerical $V_{T}$ mismatch study indicates the fact that complete suppression of RDF induced device random variability in undoped channel fully depleted MOS devices is still going to be a challenge, as long as doped S/D regions are employed.

Random Dopant Fluctuation Induced Variability in Undoped Channel Si Gate all Around Nanowire n-MOSFET

The metal-gate granularity-induced threshold voltage ( $V_{T}$ ) variability and $V_{T}$ mismatch in Si gate-all-around (GAA) nanowire n-MOSFETs (n-NWFETs) are studied using coupled 3-D statistical device simulations considering quantum corrected room temperature drift-diffusion transport. The impact of metal-gate crystal grain size on linear and saturation mode $V_{T}$ variability are analyzed. The $V_{T}$ mismatch study predicts lower mismatch figure of merit ( $A_{\rm VT}$ ) in TiN-gated Si GAA n-NWFETs compared with the reported experimental mismatch data for TiN-gated Si FinFETs.

Samarth Agarwal

Papers

Leakage-Reduction Design Concepts for Low-Power Vertical Tunneling Field-Effect Transistors

Internal short circuit detection in Li-ion batteries using supervised machine learning

An Incremental Voltage Difference Based Technique for Online State of Health Estimation of Li-ion Batteries.

Random Dopant Fluctuation Induced Variability in Undoped Channel Si Gate all Around Nanowire n-MOSFET

Metal-Gate Granularity-Induced Threshold Voltage Variability and Mismatch in Si Gate-All-Around Nanowire n-MOSFETs