There is, I think, something ethereal about i —the square root of minus one. I remember first hearing about it at school. It seemed an odd beast at that time—an intruder hovering on the edge of reality.

Usually familiarity dulls this sense of the bizarre, but in the case of i it was the reverse: over the years the sense of its surreal nature intensified. It seemed that it was impossible to write mathematics that described the real world in …

I and i

International Technology Roadmap for Semiconductors 2003の要求清浄度について － シリコンウエハ表面と雰囲気環境に要求される清浄度, 分析方法の現状について －

Early dark energy (EDE) that behaves like a cosmological constant at early times (redshifts z≳3000) and then dilutes away like radiation or faster at later times can solve the Hubble tension. In these models, the sound horizon at decoupling is reduced resulting in a larger value of the Hubble parameter H_{0} inferred from the cosmic microwave background (CMB). We consider two physical models for this EDE, one involving an oscillating scalar field and another a slowly rolling field. We perform a detailed calculation of the evolution of perturbations in these models. A Markov Chain Monte Carlo search of the parameter space for the EDE parameters, in conjunction with the standard cosmological parameters, identifies regions in which H_{0} inferred from Planck CMB data agrees with the SH0ES local measurement. In these cosmologies, current baryon acoustic oscillation and supernova data are described as successfully as in the cold dark matter model with a cosmological constant, while the fit to Planck data is slightly improved. Future CMB and large-scale-structure surveys will further probe this scenario.

/pdf/early-dark-energy-can-resolve-the-hubble-tension-13pxyq2mp9.pdf

Early Dark Energy can Resolve the Hubble Tension.

Neuromorphic computing has come to refer to a variety of brain-inspired computers, devices, and models that contrast the pervasive von Neumann computer architecture This biologically inspired approach has created highly connected synthetic neurons and synapses that can be used to model neuroscience theories as well as solve challenging machine learning problems The promise of the technology is to create a brain-like ability to learn and adapt, but the technical challenges are significant, starting with an accurate neuroscience model of how the brain works, to finding materials and engineering breakthroughs to build devices to support these models, to creating a programming framework so the systems can learn, to creating applications with brain-like capabilities In this work, we provide a comprehensive survey of the research and motivations for neuromorphic computing over its history We begin with a 35-year review of the motivations and drivers of neuromorphic computing, then look at the major research areas of the field, which we define as neuro-inspired models, algorithms and learning approaches, hardware and devices, supporting systems, and finally applications We conclude with a broad discussion on the major research topics that need to be addressed in the coming years to see the promise of neuromorphic computing fulfilled The goals of this work are to provide an exhaustive review of the research conducted in neuromorphic computing since the inception of the term, and to motivate further work by illuminating gaps in the field where new research is needed

A Survey of Neuromorphic Computing and Neural Networks in Hardware.

Solid-state electronics

In this work, Ge-based high-hole-mobility transistor with Si compatibility is designed, and its performance is evaluated. A 2-dimensional hole gas is effectively constructed by a AlGaAs/Ge/Si heterojunction with a sufficiently large valence band offset. Moreover, an intrinsic Ge channel is exploited so that high hole mobility is preserved without dopant scattering. Effects of design parameters such as gate length, Ge channel thickness, and aluminum fraction in the barrier material on device characteristics are thoroughly investigated through device simulations. A high on-current above 30 μA/μm along with a low subthreshold swing was obtained from an optimized planar device for low-power applications.

/pdf/silicon-compatible-high-hole-mobility-transistor-with-an-24ymjive88.pdf

Silicon-compatible high-hole-mobility transistor with an undoped germanium channel for low-power application

In this work, a novel processing technique for patterning of graphene monolayer prepared on various platforms, glass and poly(ethylene terephthalate) (PET) substrates, is suggested and experimented for its validity evaluation. Two process parameters of the Q-switched 1064 µm Nd:YVO4 laser system, scanning speed and repetition rate, were controlled for investigating the geometric features of the graphene line patterns and obtaining an optimum process conditions in the given laser system. The differences among line patterns acquired by controlled process conditions and substrate materials have been investigated and the underlying physics is contemplated. Multiple tools were utilized for evaluating the results, which included an optical microscopy for dimension check, Raman analysis, and G- and 2D-peak mapping technique. Continuous graphene line patterns have been successfully obtained from the most of the schemed process conditions and it would be revealed that the laser pattering is a plausible technique for patterning the graphene monolayers in fabricating various electronic and optical devices.

Nd:YVO4 laser ablation of graphene films on glass and poly(ethylene terephthalate) substrates

A charge trap folded NAND (FNAND) Flash memory device with band-gap-engineered (BE) storage node is proposed. Because of the compact cell layout without junction contacts, a NAND Flash memory is the most suitable memory medium for electronic appliances. Two memory cells are put together to have a common vertical channel, which enables one to achieve a theoretical near-30-nm technology. The resulting array is made by folding the conventional 2-D Flash memory and is called FNAND. The memory storage node uses a BE stack structure, where the oxide-nitride-oxide multilayers replace the tunnel oxide. The fin structures for both wordline and bitline have been formed by sidewall spacer patterning, instead of photolithography. The fabrication processes for SONONOS NAND Flash memory having independent double gates are explained. Electrical characteristics regarding memory operations under paired cell interference are analyzed.

A Charge Trap Folded nand Flash Memory Device With Band-Gap-Engineered Storage Node

The present invention provides a transistor and a fabrication method thereof. By a silicon nanowire as a core region being serially wrapped by a germanium channel, a gate insulating film and a gate, the present invention enables to form a potential well for storing holes as a carrier of HHMT in the germanium channel by a valance band energy offset between the silicon core region and the germanium channel, to gain maximum gate controllability to the germanium channel, and to simplify a fabricating process by simultaneously forming the germanium channel and the gate insulating film in one process.

Transistor having germanium channel on silicon nanowire and fabrication method thereof

Gallium nitride (GaN) is a promising material for next-generation high-power applications due to its wide bandgap, high breakdown field, high electron mobility, and good thermal conductivity. From a structure point of view, the vertical device is more suitable to high-power applications than planar devices because of its area effectiveness. However, it is challenging to obtain a completely upright vertical structure due to inevitable sidewall slope in anisotropic etching of GaN. In this letter, we design and analyze the enhancement-mode n-channel vertical GaN MOSFET with variation of sidewall gate angle by two-dimensional (2D) technology computer-aided design (TCAD) simulations. As the sidewall slope gets closer to right angle, the device performances are improved since a gradual slope provides a leakage current path through the bulk region.

Seongjae Cho

Papers

Silicon-compatible high-hole-mobility transistor with an undoped germanium channel for low-power application

Nd:YVO4 laser ablation of graphene films on glass and poly(ethylene terephthalate) substrates

A Charge Trap Folded nand Flash Memory Device With Band-Gap-Engineered Storage Node

Transistor having germanium channel on silicon nanowire and fabrication method thereof

Electrical Characteristics of Enhancement-Mode n-Channel Vertical GaN MOSFETs and the Effects of Sidewall Slope