S
Shahin Nazarian
Researcher at University of Southern California
Publications - 127
Citations - 1854
Shahin Nazarian is an academic researcher from University of Southern California. The author has contributed to research in topics: Logic gate & Smart grid. The author has an hindex of 18, co-authored 121 publications receiving 1420 citations. Previous affiliations of Shahin Nazarian include Magma Design Automation.
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A Vertex Cut based Framework for Load Balancing and Parallelism Optimization in Multi-core Systems.
TL;DR: A vertex cut framework for partitioning LLVM IR graphs into clusters while taking into consideration the data communication and workload balance among clusters is designed and a memory-centric run-time mapping of the linear time complexity to map clusters generated from the vertex cut algorithms onto a multi-core platform is proposed.
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H2O-Cloud: A Resource and Quality of Service-Aware Task Scheduling Framework for Warehouse-Scale Data Centers -- A Hierarchical Hybrid DRL (Deep Reinforcement Learning) based Approach
TL;DR: The proposed H2O-Cloud is highly scalable and considers comprehensive information such as various workload scenarios, cloud platform configurations, user request information and dynamic pricing model, which enable it to efficiently start on-the-go scheduling and learning in an unpredictable environment without pre-training.
Proceedings ArticleDOI
Cell Delay Analysis Based on Rate-of-Current Change
Shahin Nazarian,Massoud Pedram +1 more
TL;DR: A cell delay model based on rate-of-current-change is presented, which accounts for the impact of the shape of the noisy waveform on the output voltage waveform.
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H2O-Cloud: A Resource and Quality of Service-Aware Task Scheduling Framework for Warehouse-Scale Data Centers
TL;DR: H2O-Cloud as mentioned in this paper is a hierarchical and hybrid online task scheduling framework for warehouse-scale cloud service providers, which considers comprehensive information, such as various workload scenarios, cloud platform configurations, user request information, and dynamic pricing model.
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Logic Verification of Ultra-Deep Pipelined Beyond-CMOS Technologies.
TL;DR: The Multi-Cycle Input Dependency (MCID) circuit model is presented which is a novel model representation of design to explicitly capture the dependency of primary outputs of the circuit on sequences of internal signals and inputs.