인공고관절의 세라믹 볼 헤드의 기계적 안정성 평가를 위한 3 차원 유한요소 해석

Abstract The emergence of silicon photonics over the past two decades has established silicon as a preferred substrate platform for photonic integration. While most silicon-based photonic components have so far been realized in the near-infrared (near-IR) telecommunication bands, the mid-infrared (mid-IR, 2–20-μm wavelength) band presents a significant growth opportunity for integrated photonics. In this review, we offer our perspective on the burgeoning field of mid-IR integrated photonics on silicon. A comprehensive survey on the state-of-the-art of key photonic devices such as waveguides, light sources, modulators, and detectors is presented. Furthermore, on-chip spectroscopic chemical sensing is quantitatively analyzed as an example of mid-IR photonic system integration based on these basic building blocks, and the constituent component choices are discussed and contrasted in the context of system performance and integration technologies.

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Mid-infrared integrated photonics on silicon: a perspective

Theoretical and experimental investigation of highly photocatalytic performance of CuInZnS nanoporous structure for removing the NO gas

Recently it has been shown that it is possible to achieve directional emission out of a subwavelength aperture in a periodically corrugated metallic thin film. We report on theoretical and experimental studies of a related phenomenon concerning light emitted from photonic crystal waveguides that are less than a wavelength wide. We find that the termination of the photonic crystal end facets and an appropriate choice of the wavelength are instrumental in achieving very low numerical apertures. Our results hold promise for the combination of photonic crystal waveguides with conventional optical systems such as fibers, waveguides, and freely propagating light beams.

Highly Directional Emission from Photonic Crystal Waveguides of Subwavelength Width

An efficient way to reduce the power consumption of electronic devices is to lower the supply voltage, but this voltage is restricted by the thermionic limit of subthreshold swing (SS), 60 millivolts per decade, in field-effect transistors (FETs). We show that a graphene Dirac source (DS) with a much narrower electron density distribution around the Fermi level than that of conventional FETs can lower SS. A DS-FET with a carbon nanotube channel provided an average SS of 40 millivolts per decade over four decades of current at room temperature and high device current I60 of up to 40 microamperes per micrometer at 60 millivolts per decade. When compared with state-of-the-art silicon 14-nanometer node FETs, a similar on-state current Ion is realized but at a much lower supply voltage of 0.5 volts (versus 0.7 volts for silicon) and a much steeper SS below 35 millivolts per decade in the off-state.

https://science.sciencemag.org/content/sci/361/6400/387.full.pdf

Dirac-source field-effect transistors as energy-efficient, high-performance electronic switches

We report the investigation of negative differential resistance (NDR) in negative capacitance (NC) germanium (Ge) pFETs. The NDR in NC transistors is attributed to the coupling of drain voltage to the internal gate voltage ${V}_{\text {int}}$ via the gate-to-drain capacitance. It is demonstrated that NDR strongly depends on the matching between the NC induced by ferroelectric capacitance ${C}_{\text {FE}}$ and the positive capacitance associated with the underlying transistor capacitance ${C}_{\text {MOS}}$ . For the non-hysteretic devices, NDR gets pronounced with an increased thickness of ferroelectric film ${t}_{\text {fe}}$ and ${V}_{\text {GS}}$ . This is attributed to the fact that the drain coupling factor is improved with an increased ${t}_{\text {fe}}$ and ${V}_{\text {GS}}$ , leading to the better matching between ${C}_{\text {FE}}$ and ${C}_{\text {MOS}}$ . For the hysteretic NC transistors, however, NDR is only obtained at the lower ${V}_{\text {GS}}$ , but not observed at higher ${V}_{\text {GS}}$ .

Negative Differential Resistance in Negative Capacitance FETs

Negative capacitance (NC) GeSn pFETs integrated with HfZrO x (HZO) ferroelectric film is demonstrated with sub-20 mV/decade subthreshold swing (SS) over two orders of magnitude of ${I}_{\text {DS}}$ . The ratio of remnant polarization to coercivity in HZO is significantly improved with the increasing of the annealing temperature from 400 °C to 500 °C, which contributes to the effective reduction of hysteresis in ferroelectric NC GeSn transistors. Ferroelectric NC GeSn pFET annealed at 500 °C achieves a hysteresis of 70 mV while maintaining a steep SS dramatically lower than 60 mV/decade, and an improved ${I}_{\text {DS}}$ over control device without HZO.

Ferroelectric Negative Capacitance GeSn PFETs With Sub-20 mV/decade Subthreshold Swing

A van der Waals Synaptic Transistor Based on Ferroelectric Hf 0.5 Zr 0.5 O 2 and 2D Tungsten Disulfide

We design a heterojunction-enhanced n-channel tunneling FET (HE-NTFET) employing a Ge1− x Sn x /Ge1− y Sn y ( $x>y$ ) heterojunction located in the channel region with a distance of $L_{\rm T-H}$ from the source-channel tunneling junction. We investigate the impact of $L_{\rm T-H}$ on the performance of HE-NTFETs by simulation. HE-NTFETs achieve a positive shift of $V_{\rm ONSET}$ , a steeper subthreshold swing (SS), and an enhanced $I_{\mathrm{{\scriptscriptstyle ON}}}$ compared with homo-NTFETs, which is attributed to the modulating effect of heterojunction on band-to-band tunneling (BTBT). At a supply voltage of 0.3 V, 304% $I_{\mathrm{{\scriptscriptstyle ON}}}$ enhancement is demonstrated in the Ge0.92Sn0.08/Ge0.94Sn0.06 HE-NTFET with a 4 nm $L_{\rm T-H}$ over Ge0.92Sn0.08 homo-NTFET due to the steeper average SS. The impact of Sn composition on the performance of HE-NTFETs is also studied. As we increase the difference in Sn composition $x-y$ across the heterojunction, $I_{\mathrm{{\scriptscriptstyle ON}}}$ and SS of HE-NTFETs are improved due to the increase in band offsets at the Ge1− x Sn x /Ge1− y Sn y interface, which leads to the enhanced modulating effect of heterojunction on BTBT.

Design of GeSn-Based Heterojunction-Enhanced N-Channel Tunneling FET With Improved Subthreshold Swing and ON-State Current

Ultrathin GeSn channels were epitaxially grown on Si(111) and (001) substrates using solid source molecular beam epitaxy. Well-behaved GeSn quantum well (QW) pTFETs and pMOSFETs were fabricated on Si. GeSn QW pMOSFETs on Si(111) demonstrate a high effective hole mobility of 505 cm2/Vs, indicating the high crystallinity of the GeSn material. GeSn QW pTFETs on Si(111) outperform the devices on Si(001) on subthreshold swing (SS) and ON-state current $I_{\mathrm{\scriptscriptstyle ON}}$ . (111)-oriented GeSn pTFET with a 4-nm-thick channel achieves a steep SS of $\sim 60$ mV/decade and a high ON-state/OFF-state current ratio of $10^{7}$ , which are superior to those of the other reported non-Si pTFETs with a small bandgap.

Yan Liu

Papers

Negative Differential Resistance in Negative Capacitance FETs

Ferroelectric Negative Capacitance GeSn PFETs With Sub-20 mV/decade Subthreshold Swing

A van der Waals Synaptic Transistor Based on Ferroelectric Hf 0.5 Zr 0.5 O 2 and 2D Tungsten Disulfide

Design of GeSn-Based Heterojunction-Enhanced N-Channel Tunneling FET With Improved Subthreshold Swing and ON-State Current

GeSn Quantum Well P-Channel Tunneling FETs Fabricated on Si(001) and (111) With Improved Subthreshold Swing