Resistive switching effect in transition metal oxide (TMO) based material is often associated with the valence change mechanism (VCM). Typical modeling of valence change resistive switching memory consists of three closely related phenomena, i.e., conductive filament (CF) geometry evolution, conduction mechanism and temperature dynamic evolution. It is widely agreed that the electrochemical reduction-oxidation (redox) process and oxygen vacancies migration plays an essential role in the CF forming and rupture process. However, the conduction mechanism of resistive switching memory varies considerably depending on the material used in the dielectric layer and selection of electrodes. Among the popular observations are the Poole-Frenkel emission, Schottky emission, space-charge-limited conduction (SCLC), trap-assisted tunneling (TAT) and hopping conduction. In this article, we will conduct a survey on several published valence change resistive switching memories with a particular interest in the I-V characteristic and the corresponding conduction mechanism.

Conduction Mechanism of Valence Change Resistive Switching Memory: A Survey

In this manuscript, recent progress in the area of resistive random access memory (RRAM) technology which is considered one of the most standout emerging memory technologies owing to its high speed, low cost, enhanced storage density, potential applications in various fields, and excellent scalability is comprehensively reviewed. First, a brief overview of the field of emerging memory technologies is provided. The material properties, resistance switching mechanism, and electrical characteristics of RRAM are discussed. Also, various issues such as endurance, retention, uniformity, and the effect of operating temperature and random telegraph noise (RTN) are elaborated. A discussion on multilevel cell (MLC) storage capability of RRAM, which is attractive for achieving increased storage density and low cost is presented. Different operation schemes to achieve reliable MLC operation along with their physical mechanisms have been provided. In addition, an elaborate description of switching methodologies and current voltage relationships for various popular RRAM models is covered in this work. The prospective applications of RRAM to various fields such as security, neuromorphic computing, and non-volatile logic systems are addressed briefly. The present review article concludes with the discussion on the challenges and future prospects of the RRAM.

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Resistive Random Access Memory (RRAM): an Overview of Materials, Switching Mechanism, Performance, Multilevel Cell (mlc) Storage, Modeling, and Applications

The rapid development of information technology has led to urgent requirements for high efficiency and ultralow power consumption. In the past few decades, neuromorphic computing has drawn extensive attention due to its promising capability in processing massive data with extremely low power consumption. Here, we offer a comprehensive review on emerging artificial neuromorphic devices and their applications. In light of the inner physical processes, we classify the devices into nine major categories and discuss their respective strengths and weaknesses. We will show that anion/cation migration-based memristive devices, phase change, and spintronic synapses have been quite mature and possess excellent stability as a memory device, yet they still suffer from challenges in weight updating linearity and symmetry. Meanwhile, the recently developed electrolyte-gated synaptic transistors have demonstrated outstanding energy efficiency, linearity, and symmetry, but their stability and scalability still need to be optimized. Other emerging synaptic structures, such as ferroelectric, metal–insulator transition based, photonic, and purely electronic devices also have limitations in some aspects, therefore leading to the need for further developing high-performance synaptic devices. Additional efforts are also demanded to enhance the functionality of artificial neurons while maintaining a relatively low cost in area and power, and it will be of significance to explore the intrinsic neuronal stochasticity in computing and optimize their driving capability, etc. Finally, by looking into the correlations between the operation mechanisms, material systems, device structures, and performance, we provide clues to future material selections, device designs, and integrations for artificial synapses and neurons.

A comprehensive review on emerging artificial neuromorphic devices

This paper provides a tutorial overview over recent vigorous efforts to develop computing systems based on spin waves instead of charges and voltages. Spin-wave computing can be considered a subfield of spintronics, which uses magnetic excitations for computation and memory applications. The Tutorial combines backgrounds in spin-wave and device physics as well as circuit engineering to create synergies between the physics and electrical engineering communities to advance the field toward practical spin-wave circuits. After an introduction to magnetic interactions and spin-wave physics, the basic aspects of spin-wave computing and individual spin-wave devices are reviewed. The focus is on spin-wave majority gates as they are the most prominently pursued device concept. Subsequently, we discuss the current status and the challenges to combine spin-wave gates and obtain circuits and ultimately computing systems, considering essential aspects such as gate interconnection, logic level restoration, input–output consistency, and fan-out achievement. We argue that spin-wave circuits need to be embedded in conventional complementary metal–oxide–semiconductor (CMOS) circuits to obtain complete functional hybrid computing systems. The state of the art of benchmarking such hybrid spin-wave–CMOS systems is reviewed, and the current challenges to realize such systems are discussed. The benchmark indicates that hybrid spin-wave–CMOS systems promise ultralow-power operation and may ultimately outperform conventional CMOS circuits in terms of the power-delay-area product. Current challenges to achieve this goal include low-power signal restoration in spin-wave circuits as well as efficient spin-wave transducers.

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Introduction to spin wave computing

Content-addressable memory (CAM) and associative memory (AM) are types of storage structures that allow searching by content as opposed to searching by address. Such memory structures are used in diverse applications ranging from branch prediction in a processor to complex pattern recognition. In this paper, we review the emerging challenges and opportunities in implementing different varieties of CAM/AM structures. Beyond-CMOS silicon and nonsilicon memory technologies hold significant promise in implementing dense, fast, and energy-efficient CAM/AM structures. We describe circuit/architecture level implementations of CAM/AM using these technologies, as well as novel applications in different domains, including informatics, text analytics, data mining, and reconfigurable computing platforms.

Emerging Trends in Design and Applications of Memory-Based Computing and Content-Addressable Memories

Review of memristor devices in neuromorphic computing: materials sciences and device challenges

We report the switching characteristics of RRAM devices consisting of Ru/HfO2/TiO2-x/Ru stacks with and without an external access device. In addition to bistable switching, we also achieved an analog reconfiguration of resistance by controlling the compliance current or the reset voltage to achieve a low-resistance state (LRS) or a high-resistance state (HRS), respectively. All intermediate states were nonvolatile in nature. The transport studies using temperature-dependent I-V measurement indicated the mechanism of conduction to be ionic in LRS and Frenkel-Poole in both HRS and virgin resistance state of a device.

Switching Characteristics of $\hbox{Ru/HfO}_{2} \hbox{/TiO}_{2-x}\hbox{/Ru}$ RRAM Devices for Digital and Analog Nonvolatile Memory Applications

In this paper, we report multi-level cell (MLC) switching characteristics of resistive random access memory devices with a W/Zr/HfO2/TiN stack. A multi-step forming technique was implemented in this work which efficiently suppressed the forming current overshoot and allowed device switching at a low set/reset voltage and current. Four distinct resistance states, achieved by controlling the reset stop voltages, showed excellent endurance. Write/read/erase energy values for different states were also calculated. Amongst four MLC states, it was found that the lowest resistance state of three distinct high-resistance states was prone to failing over time under constant voltage stress.

http://iopscience.iop.org/article/10.1088/0268-1242/30/7/075002/pdf

Switching characteristics of W/Zr/HfO2/TiN ReRAM devices for multi-level cell non-volatile memory applications

We report the switching dynamics and charge transport studies on Ru/HfO2/TiOx/Ru resistive random access memory devices in low resistance state (LRS), high resistance state (HRS), and virgin resistance state (VRS). The charge transport in LRS is governed by Ohmic conduction of electrons through local filamentary paths while it is governed by a combination of Frenkel-Poole emission and trap assisted tunneling process in HRS and VRS. The area of the filament in LRS is extracted and related to the compliance current. The thickness of the re-oxidized filament is extracted and related to the reset voltage in HRS. The energy consumed during the reset process was analyzed on the time-scale to experimentally demonstrate joule-heating mediated oxidation dynamics of filament during device reset.

Switching dynamics and charge transport studies of resistive random access memory devices

Memory is an integral and important component of both general-purpose and embedded systems. It is widely acknowledged that energy of the memory structure is a major contributor in overall system energy. Recent advances with emerging non-volatile memory (NVM) technologies can potentially alleviate the issue of memory leakage power. However, they introduce new challenges and opportunities for dynamic power management in memory. In this paper, we consider resistive random access memory (RRAM), a promising NVM technology, and observe that a specific feature of the memory, namely, its multi-level cell (MLC) structure, can be used to significantly reduce its read access energy. Unlike conventional CMOS static random access memory (SRAM), the read access energy in RRAM largely depend on the stored content. Based on this observation, we present an efficient encoding technique for improving the energy efficiency for multi-level cell RRAM. Our simulation results with benchmark applications demonstrate an order-of-magnitude energy reduction with modest area overhead.

Yibo Li

Papers

Review of memristor devices in neuromorphic computing: materials sciences and device challenges

Switching Characteristics of $\hbox{Ru/HfO}_{2} \hbox{/TiO}_{2-x}\hbox{/Ru}$ RRAM Devices for Digital and Analog Nonvolatile Memory Applications

Switching characteristics of W/Zr/HfO2/TiN ReRAM devices for multi-level cell non-volatile memory applications

Switching dynamics and charge transport studies of resistive random access memory devices

Content-aware encoding for improving energy efficiency in multi-level cell resistive random access memory