Before the emergence of ultra-wideband (UWB) radios, widely used wireless communications were based on sinusoidal carriers, and impulse technologies were employed only in specific applications (e.g. radar). In 2002, the Federal Communication Commission (FCC) allowed unlicensed operation between 3.1–10.6 GHz for UWB communication, using a wideband signal format with a low EIRP level (−41.3dBm/MHz). UWB communication systems then emerged as an alternative to narrowband systems and significant effort in this area has been invested at the regulatory, commercial, and research levels.

IEEE Transactions on Microwave Theory and Techniques and Antennas and Propagation Announce a Joint Special Issue on Ultra-Wideband (UWB) Technology

Understanding ultra-wide-band (UWB) propagation channels is a prerequisite for UWB system design as well as communication-theoretic and information-theoretic investigations. This paper surveys the fundamental properties of UWB channels, pointing out the differences to conventional channels. If the relative bandwidth is large, the propagation processes, and therefore path loss and shadowing, become frequency-dependent, and the well-known wide-sense stationary uncorrelated scattering model is not applicable anymore. If the absolute bandwidth is large, the shape of the impulse responses as well as the fading statistics change. This paper also describes methods for measuring UWB channels and extracing channel parameters. Throughout this paper, the relationship between channel properties and other areas of UWB research are pointed out.

Ultra-Wide-Band Propagation Channels

Reactive matching is extended to wide bandwidths using the impedance property of LC-ladder filters. In this paper, we present a systematic method to design wideband low-noise amplifiers. An SiGe amplifier with on-chip matching network spanning 3-10 GHz delivers 21-dB peak gain, 2.5-dB noise figure, and -1-dBm input IP3 at 5 GHz, with a 10-mA bias current.

A 3-10-Ghz low-noise amplifier with wideband LC-ladder matching network

In this paper, we present a scalable transmitter architecture for power generation and beam-steering at THz frequencies using a centralized frequency reference, sub-harmonic signal distribution, and local phase control. The power generation and radiator core is based on a novel method called distributed active radiation, which enables high conversion efficiency from DC to radiated terahertz power above fmax of a technology. The design evolution of the distributed active radiator (DAR) follows from an inverse design approach, where metal surface currents at different harmonics are formulated in the silicon chip for the desired electromagnetic field profiles. Circuits and passives are then designed conjointly to synthesize and control the surface currents. The DAR consists of a self-oscillating active electromagnetic structure, comprising of two loops which sustain out-of-phase currents at the fundamental frequency and in-phase currents at the second harmonic. The fundamental signal, thus gets, spatially filtered, while the second harmonic is radiated selectively, thereby consolidating signal generation, frequency multiplication, radiation of desired harmonic and filtration of undesired harmonics simultaneously in a small silicon footprint. A two-dimensional 4×4 radiating array implemented in 45 nm SOI CMOS (without high-resistivity substrate) radiates with an EIRP of +9.4 dBm at 0.28 THz and beam-steers in 2D over 80° in both azimuth and elevation. The chip occupies 2.7 mm × 2.7 mm and dissipates 820 mW of DC power. To the best of the authors' knowledge, this is the first reported integrated beam-scanning array at THz frequencies in silicon.

A 0.28 THz Power-Generation and Beam-Steering Array in CMOS Based on Distributed Active Radiators

To meet the needs of next-generation high-data-rate applications, 60 GHz wireless networks must deliver Gb/s data rates and reliability at a low cost. In this article, we surveyed several ongoing challenges, including the design of cost-efficient and low-loss on-chip and in-package antennas and antenna arrays, the characterization of CMOS processes at millimeter-wave frequencies, the discovery of efficient modulation techniques that are suitable for the unique hardware impairments and frequency selective channel characteristics at millimeter-wave frequencies, and the creation of MAC protocols that more effectively coordinate 60 GHz networks with directional antennas. Solving these problems not only provides for wireless video streaming and interconnect replacement, but also moves printed and magnetic media such as books and hard drives to a lower cost, higher reliability semiconductor form factor with wireless connectivity between and within devices.

60 GHz Wireless: Up Close and Personal

This paper presents a 210-GHz transceiver with OOK modulation in a 32-nm SOI CMOS process (fT/fmax= 250/320 GHz). The transmitter (TX) employs a 2 × 2 spatial combining array consisting of a double-stacked cross-coupled voltage controlled oscillator (VCO) at 210 GHz with an on-off-keying (OOK) modulator, a power amplifier (PA) driver, a novel balun-based differential power distribution network, four PAs, and an on-chip 2 × 2 dipole antenna array. The noncoherent receiver (RX) utilizes a direct detection architecture consisting of an on-chip antenna, a low-noise amplifier (LNA), and a power detector. The VCO generates measured -13.5-dBm output power, and the PA shows a measured 15-dB gain and 4.6-dBm Psat. The LNA exhibits a measured in-band gain of 18 dB and minimum in-band noise figure (NF) of 11 dB. The TX achieves an EIRP of 5.13 dBm at 10 dB back-off from saturated power. It achieves an estimated EIRP of 15.2 dBm when the PAs are fully driven. This is the first demonstration of a fundamental frequency CMOS transceiver at the 200-GHz frequency range.

A CMOS 210-GHz Fundamental Transceiver With OOK Modulation

The propagation mechanisms of radio waves over intra-chip channels was studied with integrated antennas for wireless chip area networks. Test vehicles were designed and fabricated on silicon wafers of both low and high resistivities, respectively, using complementary metal oxide semiconductor (CMOS) processes. On-wafer measurements for propagation of radio waves over intra-chip channels were conducted in the frequency domain from 10 to 110 GHz with a network analyzer. Time-domain analysis was performed to characterize intra-chip radio channels and more importantly to understand the propagation mechanisms. It was found that path loss factor is constantly less than two and propagation delay of the first-arrival wave is significantly longer than that by free-space transmission. Thus, we concluded that the propagation of radio waves over intra-chip channels is mainly realized with surface wave rather than space wave. Surface wave is guided on air-wafer interface. In addition, effects of metal lines, in both parallel and normal placements with respect to wave propagation direction, on signal propagation were also investigated.

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Propagation Mechanisms of Radio Waves Over Intra-Chip Channels With Integrated Antennas: Frequency-Domain Measurements and Time-Domain Analysis

Two monolithically integrated W-band frequency synthesizers are presented Implemented in a 018 μm SiGe BiCMOS with fT/fmax of 200/180 GHz, both circuits incorporate the same 303-338 GHz PLL core One synthesizer uses an injection-locked frequency tripler (ILFT) with locking range of 928-981 GHz and the other employs a harmonic-based frequency tripler (HBFT) with 3-dB bandwidth of 105 GHz from 909-1014 GHz, respectively The measured RMS phase noise for ILFT- and HBFT-based synthesizers are 54° and 55° (100 kHz to 100 MHz integration), while phase noise at 1 MHz offset is -93 and -92 dBc/Hz, respectively, at 96 GHz from a reference frequency of 125 MHz The measured reference spurs are <; -52 dBc for both prototypes The combined power consumption from 18- and 25-V is 140 mW for both chips The frequency synthesizer is suitable for integration in millimeter-wave (mm-wave) phased array and multi-pixel systems such as W-band radar/imaging and 120 GHz wireless communication

W-Band Silicon-Based Frequency Synthesizers Using Injection-Locked and Harmonic Triplers

This paper presents a W-band receiver chipset for passive millimeter-wave imaging in a 65 nm standard CMOS technology. The system comprises a direct-conversion receiver front-end with injection-locked tripler and a companion analog back-end for Dicke radiometer. The receiver design addresses the high 1/f noise issue in the advanced CMOS technology. An LO generation scheme using a frequency tripler is proposed to lower the PLL frequency, making it suitable for use in multi-pixel systems. In addition, the noise performance of the receiver is further improved by optimum biasing of transistors of the detector in moderate inversion region to achieve the highest responsivity and lowest NEP. The front-end chipset exhibits a measured peak gain of 35 dB, -3 dB BW of 12 GHz, NF of 8.9 dB, while consuming 94 mW. The baseband chipset has a measured peak responsivity (Rv) of 6 KV/W and a noise equivalent power (NEP) of 8.54 pW/Hz1/2. The two chipsets integrated on-board achieve a total responsivity of 16 MV/W and a calculated Dicke NETD of 1K with a 30 ms integration time.

A W-band CMOS Receiver Chipset for Millimeter-Wave Radiometer Systems

This paper presents a W-band 2 × 2 focal-plane array (FPA) for passive millimeter-wave imaging in a standard 0.18 μm SiGe BiCMOS process (fT/fmax = 200/180 GHz). The FPA incorporates four Dicke-type receivers representing four imaging pixels. Each receiver employs the direct-conversion architecture consisting of an on-chip slot folded dipole antenna, an SPDT switch, a low noise amplifier, a single-balanced mixer, an injection-locked frequency tripler (ILFT), an IF variable gain amplifier, a power detector, an active bandpass filter and a synchronous demodulator. The LO signal is generated by a shared Ka-band PLL and distributed symmetrically to four local ILFTs. The measured LO phase noise is -93 dBc/Hz at 1 MHz offset from the 96 GHz carrier. This imaging receiver (without antenna) achieves a measured average responsivity and noise equivalent power of 285 MV/W and 8.1 fW/Hz1/2, respectively, across the 86-106 GHz bandwidth, which results a calculated NETD of 0.48 K with a 30 ms integration time. The system NETD increases to 3 K with on-chip antenna due to its low efficiency at W-band. MMW images have been generated in transmission mode. This work demonstrates the highest integration level of any silicon-based systems in the 94 GHz imaging band.

Zhiming Chen

Papers

A CMOS 210-GHz Fundamental Transceiver With OOK Modulation

Propagation Mechanisms of Radio Waves Over Intra-Chip Channels With Integrated Antennas: Frequency-Domain Measurements and Time-Domain Analysis

W-Band Silicon-Based Frequency Synthesizers Using Injection-Locked and Harmonic Triplers

A W-band CMOS Receiver Chipset for Millimeter-Wave Radiometer Systems

A BiCMOS W-Band 2×2 Focal-Plane Array With On-Chip Antenna