Showing papers by "NEC published in 1995"

Receipt-free mix-type voting scheme: a practical solution to the implementation of a voting booth

Abstract: We present a receipt-free voting scheme based on a mixtype anonymous channel[Cha81, PIK93]. The receipt-freeness property [BT94] enables voters to hide how they have voted even from a powerful adversary who is trying to coerce him. The work of [BT94] gave the first solution using a voting booth, which is a hardware assumption not unlike that in current physical elections. In our proposed scheme, we reduce the physical assumptions required to obtain receipt-freeness. Our sole physical assumption is the existence of a private channel through which the center can send the voter a message without fear of eavesdropping.

Generalized Learning Vector Quantization

Abstract: We propose a new learning method, "Generalized Learning Vector Quantization (GLVQ)," in which reference vectors are updated based on the steepest descent method in order to minimize the cost function. The cost function is determined so that the obtained learning rule satisfies the convergence condition. We prove that Kohonen's rule as used in LVQ does not satisfy the convergence condition and thus degrades recognition ability. Experimental results for printed Chinese character recognition reveal that GLVQ is superior to LVQ in recognition ability.

A 380 ps, 9.5 mW Josephson 4-Kbit RAM operated at a high bit yield

Abstract: We have developed a Josephson 4-Kbit RAM with improved component circuits and a device structure having two Nb wiring layers. A resistor coupled driver and sense circuit are improved to have wide operating margins. The fabrication process is simplified using bias sputtering, as a result, its reliability is increased. The RAM is composed of approximately 21000 Nb/AlO/sub x//Nb Josephson junctions, Mo resistors, Nb wirings, and SiO/sub 2/ insulators. Experimental results show a minimum access time of 380 ps and power dissipation of 9.5 mW. Maximum bit yield of 84% is obtained in minimum magnetic field of about 20 /spl mu/G. We confirm that most of fail bits are caused by trapped magnetic flux, and the RAM functions properly for 98% of the memory cells after measuring fail bit map several times. >

Suspend/resume capability for a protected mode microprocessor

Abstract: A laptop computer system includes a protected mode microprocessor capable of operating in restricted and unrestricted modes, and an arrangement which in response to a predetermined condition saves information from the processor and then forcibly switches the processor to its unrestricted mode of operation. When running a multi-tasking operating system where an application program is being executed in a restricted mode, a suspend/resume operation can be carried out in which the system is substantially powered down and then powered back up, and will resume the interrupted application with the restricted mode back in effect. Further, set-up changes such as adjustment of the processor speed can be made without exiting the application program running in the restricted mode.

Data link control protocols for wireless ATM access channels

Abstract: Describes data link control procedures for wireless ATM access channels based on a dynamic TDMA/TDD frame-work. The system provides integrated ATM services including available bit-rate (ABR) data and constant/variable bit-rate (CBR/VBR) voice or video through the addition of wireless-specific medium access control (MAC) and data link control (DLC) protocol layers between the physical and ATM network layers. The purpose of the DLC protocol layer is to insulate the ATM network layer from wireless channel impairments by selective retransmission of erroneous or lost cells before they are released to the ATM layer. The DLC methods described exploit the on-demand ABR burst transmission capability of the dynamic TDMA channel to retransmit unacknowledged cells in available slots not allocated to service data. Specific error recovery procedures are outlined for both (asynchronous) ABR and (isochronous) CBR services. For ABR, the DLC operation follows a group ACK/NACK based selective reject (SREJ) procedure on a burst-burst basis, without time limits for completion. For CBR, the retransmission procedure is constrained to complete within a specified time interval, so that isochronous delivery of cells to the ATM layer can be maintained. The proposed protocols have been validated using a software emulator which incorporates a choice of radio channel models, dynamic TDMA/TDD MAC, and ABR or CBR DLC. Numerical results show that the data link control protocols under consideration can significantly improve wireless ATM service quality over impaired radio channels for both packer data ABR and stream type CBR virtual circuits.

Multiservices medium access control protocol for wireless ATM system

Abstract: A medium access control (MAC) layer protocol is used in a wireless ATM system for integrated support of ATM services, including constant bit-rate (CBR), variable bit-rate (VBR) and available bit-rate (ABR) services. The MAC protocol supports both connectionless packet and connection-oriented virtual circuit modes, with appropriate service parameter and quality-of-services selection. A dynamic time division, multiple access/time division multiplex (TDMA/TDM) approach accommodates the service classes in an integrated manner. A supervisory MAC procedure integrates ATM ABR/VBR/CBR virtual circuits, providing burst-by-burst allocation of ABR cells and call-by-call allocation of VBR and CBR bandwidth parameters. A mechanism is provided for the dynamic allocation of subframe capacities, assignment of ABR slots based on desired queueing rules, assignment of VBR slots based on ATM traffic shaper parameters and assignment of CBR slots based on bandwidth requirements.

Receipt-free mix-type voting scheme - A practical solution to the implementation of a voting booth-

Abstract: We present a receipt-free voting scheme based on a mixtype anonymous channel[Cha81, PIK93]. The receipt-freeness property [BT94] enables voters to hide how they have voted even from a powerful adversary who is trying to coerce him. The work of [BT94] gave the first solution using a voting booth, which is a hardware assumption not unlike that in current physical elections. In our proposed scheme, we reduce the physical assumptions required to obtain receipt-freeness. Our sole physical assumption is the existence of a private channel through which the center can send the voter a message without fear of eavesdropping.

Current-dependent light-emitting element drive circuit for use in active matrix display device

Abstract: In a light-emitting element drive circuit in an active matrix display device, at least one current-control transistor controls a current flowing through a light-emitting element. The current-control transistor and the light-emitting element are connected in parallel to each other. A constant current source is connected to a junction between one electrode of the light-emitting element and one electrode of the transistor through which the current 8s controlled to flow. The other electrodes of the light-emitting element and the transistor are connected to a common electrode which may be grounded via a resistor. In other configuration, it may be arranged that the light-emitting element and a capacitance are connected in parallel to each other. In this case, the current-control transistor is connected to a function between the light-emitting element and the capacitance so as to use charging and discharging operations of the capacitance for driving the light-emitting element.

Process of mounting tape automated bonded semiconductor chip on printed circuit board through bumps

Abstract: Conductive leads are connected at inner ends thereof to electrodes of a semiconductor chip through a tape automated bonding process, and bumps are formed on the other ends of the conductive leads so as to economically and reliably mount the semiconductor chip on a circuit board through a concurrent reflow.

Ab initio molecular dynamics study of first-order phase transitions : melting of silicon

Abstract: We present a scheme to compute the thermodynamic properties and the phase stability of materials based on parameter-free microscopic quantum theory Taking silicon as an example we show that properties like the specific entropy, the specific volume, or the heat capacity of a solid and a liquid can be calculated accurately In particular, we can locate the solid-liquid phase boundary and compute how thermodynamic properties change upon melting This greatly extends the range of first-principles predictions of materials properties

Process for purifying, uncapping and chemically modifying carbon nanotubes

Abstract: Disclosed is a process for purifying carbon nanotubes which has steps of 1) mixing carbon nanotubes which accompany carbon impurities with a reagent selected from a group consisting of oxidation agents, nitration agents and sulfonation agents in liquid phase, 2) reacting the carbon nanotubes with the reagent at a predetermined temperature in the liquid phase, wherein the carbon impurities except carbon nanotubes are selectively reacted to dissolve in the liquid phase, and 3) separating carbon nanotubes from which the impurities were released from the liquid phase then washing and drying it. A process for uncapping carbon nanotubes and a process for chemically modifying carbon nanotubes are also disclosed.

Method and apparatus for forming silicon oxide film by chemical vapor deposition

Abstract: The subject is a plasma-enhanced CVD process for depositing a silicon oxide film on a substrate by using an organosilicon compound such as tetraethoxysilane and oxygen or ozone as the essential reactants. The disclosed CVD method uses a plasma containing oxygen ions, and the density of oxygen ions impinging on the substrate surface is cyclically decreased and increased with a short period such as, e.g., 1 sec. In extreme cases which are rather preferable, the effect of the oxygen plasma is cyclically nullified and returned to a maximum to thereby alternate plasma CVD and plain thermal CVD. The obtained film is comparable in film properties to silicon oxide films deposited by known plasma CVD methods and, when the substrate has steps such as aluminum wiring lines, is better in step coverage and gap filling capability. The film exhibits a still better profile when hydrogen peroxide gas or an alternative hydrogen containing gas is added to the reactant gas mixture.

Rate-based congestion control for ATM networks

Abstract: Congestion control plays an important role in the effective and stable operation of ATM networks. This paper first gives a historical overview of rate-based congestion control algorithms developed in the ATM Forum, showing how the current ATM Forum standard regarding the traffic management control methods is exploited, by these algorithm. Then, analytical approach is used to quantitatively evaluate their performance and show the effectiveness of the rate-based approach. In presenting the numerical examples, we emphasize that appropriate control parameter settings are essential for proper traffic management in an ATM network environment.

Process of fabricating dynamic random access memory device having storage capacitor low in contact resistance and small in leakage current through tantalum oxide film

Abstract: When tantalum oxide is used for a dielectric film of a stacked type storage capacitor forming a memory cell together with a switching transistor, heat treatments are limited to 530 degrees centigrade in the stages after the deposition of the tantalum oxide, and leakage current across the tantalum oxide is drastically decreased.

Adjacent cursor system with tactile feedback for the blind

Abstract: In a pointing system for use in notifying an operator of a cursor position on a display without relying on a sense of sight, information is derived in relation to an interactive item from a plurality of positions which are adjacent to the cursor position. A tactile sense or an inner force sense is determined by a relationship of the interactive items between the cursor position and the adjacent positions. The tactile sense may be displayed by a tactile display while the inner force sense, by a movable stage controllable by braking units. An absolute coordinate system may be used to indicate a position of the tactile display or the movable stage and is in one-to-one correspondence to a coordinate system of the display.

Digital phase locked loop having coarse and fine stepsize variable delay lines

Abstract: In a digital phase locked loop, a coarse stepsize variable delay line and a fine stepsize variable delay line are connected in series for receiving a reference clock pulse and imparting thereto variable delays in accordance with higher significant bits and lower significant bits. The delayed clock pulse is delivered to the input of a clock tree through which the clock pulse propagates and are supplied to various parts of an integrated circuit chip. A phase detector provides a phase comparison between the reference clock pulse and a delayed clock pulse appearing at one of the outputs of the clock tree. A delay controller counts the reference clock pulse to produce a count value, and increments or decrements the count value in accordance with the output of the phase detector. The up-down count value is supplied as the higher and lower significant bits to the coarse and fine stepsize variable delay lines at such longer intervals than the intervals at which the reference clock pulse occurs, so that the delayed clock pulse is allowed a sufficient time to propagate through the clock tree.

Semiconductor device with a film carrier tape

Abstract: Disclosed is a semiconductor device which has a semiconductor IC chip, a base film forming a basis of a film carrier tape, through-holes and device holes which open in the base film, a copper-foil wiring formed on the base film, inner leads formed at the inside end of the copper-foil wiring, lands for connecting to outside, apertures formed in the center of the respective lands, cover resist formed on the base film except the lands, sealing resin for protecting the semiconductor IC chip and solder bumps.

Planarized interlayer insulating film formed of stacked BPSG film and ozone-teos NSG film in semiconductor device and method for forming the same

Abstract: A semiconductor device formed at a substrate surface region is coated with a non-doped CVD silicon oxide film, and an interlayer insulating film composed of a BPSG film, a first ozone-TEOS NSG film and a second ozone-TEOS NSG film is formed on the silicon oxide film. The BPSG film has a thickness of not less than 50 nm but not greater than 200 nm, and is heat-treated at a temperature of not lower than 700° C. but not higher than 800° C. In addition, the first and second zone-TEOS NSG films are also heat-treated at a temperature of not lower than 700° C. but not higher than 800° C.

Plasma processing method and equipment used therefor

Abstract: A plasma processing method is provided which suppresses the charge accumulation on a processing object such as a semiconductor substrate. An alternating excitation signal in the form of pulses for exciting the plasma is supplied to a reaction gas contained in a plasma chamber, each pulse having an on-period t on for supplying the excitation signal and an off-period t off for stopping the excitation signal. The off period ranges from 10 to 100 μsec. The on-period may be determined as needed. An alternating bias signal for biasing the processing object is also applied to the object in the chamber. The bias signal has a frequency of at most 600 kHz. As a result, an increased number of positive and negative ions impinge the object thus increasing the processing rate and reducing the charge accumulation compared to prior art processes.

Semiconductor device with plastic material covering a semiconductor chip mounted on a substrate of the device

Abstract: A plastic covered semiconductor device that enables to simplify the structure and fabrication to reduce the assembly cost of the device and to reduce the thickness or height of the device. This device contains a substrate having a first surface and a second surface opposite to the first surface, a semiconductor chip mounted on or over the first surface, lead fingers joined to the first surface, interconnecting conductors electrically interconnecting the semiconductor chip with the corresponding lead fingers, respectively, and a plastic covering material formed to cover the first surface. Each lead finger is made of an inner part bonded to the first surface of the substrate and an outer part protruding the covering material. The covering material confines the semiconductor chip, the interconnecting conductors and the inner parts of the lead fingers. The second surface of the substrate is exposed from the covering material. An edge of the covering material is substantially in accordance with an edge of the first surface. The substrate acts as a top or bottom of a package of the device.

VCSELs (vertical-cavity surface emitting lasers) and VCSEL-based devices

Abstract: In order to control polarization direction of laser light emitted by a vertical cavity surface emitting laser (VCSEL), cross-sectional dimension of the p-DBR is so limited as to permit only a single fundamental transverse mode in a waveguide composed by the p-DBR. Some VCSEL-based devices are developed using arrays of VCSELs in which each VCSEL has a controlled direction of polarization.

System for generating atmospheric quasi-sound for audio performance

Abstract: An atmospheric quasi-sound generating system for music performance includes a reproducing device for reproducing the sound of a piece of music from a recording medium to obtain a musical sound signal, an effective sound library for storing effective sounds to generate any atmospheric sound for music performance, a selection device for select a desired effective sound from the effective sound library to output information on the selected effective sound, a position determining device for determining the acoustic image position of the selected effective sound on the basis of the information on the effective sound to generate acoustic image position information, a stereophonic sound generating unit for disposing the effective sound to the determined acoustic image position to thereby output a stereophonic sound signal containing these sound information, and a mixing device for mixing the stereophonic sound signal and the musical sound signal reproduced from the reproducing device. The mixing signal thus obtained is output from speakers.

Presentation supporting device

Abstract: A presentation supporting device having excellent operability and adaptability to oral presentations in a computer multimedia environment. First and second accelerometers detect first and second acceleration of gravity resulting from inclinations in first and second sensitivity axis directions perpendicular to each other to output first and second acceleration signals, and first and second signal processors process the input first and second acceleration signals to output cursor moving control signals for controlling moving speeds and moving directions in the first and second coordinate axis directions of a cursor on a computer display screen in response to voltage values and polarities of the first and second acceleration signals.

ATM network topology auto discovery method

Abstract: A network topology discovery method automatically recognizes the physical connection relationships of each ATM switch and each ATM terminal within an ATM network. Each ATM switch and ATM terminal mutually exchanges, by ILMI protocol, port identifiers that identify every ATM port of the ATM switch or ATM terminal as well as network addresses of network management agents that manage the ATM switch and the ATM terminal, to neighboring ATM switches and ATM terminals that are directly connected to its ports. Each ATM switch and ATM terminal stores tables for each of its ATM ports that include port identifiers which indicate the identities of connected ports as well as the network addresses of the network management agents that manage the neighboring ATM switches and ATM terminals. The ATM switches or ATM terminals automatically recognize the local connection relationships with its neighboring ATM switches or ATM terminals, using a network management system, by accessing connection information and then automatically recognizing the physical connection relationships of each ATM switch and each ATM terminal. The network management system recognizes the configuration within an ATM network, whether the network management system is inside or outside the ATM network, including when a router or existing LAN coexists with the ATM network. The identities of ports connected to each port are recognized, when a plurality of links exist between ATM switches, without requiring the assignment of a respective one of its ATM network management agents to each ATM switch. Interfaces between ATM switches as well as between an ATM switch and an ATM terminal are also automatically identified.

Method and apparatus for forming bump structure used for flip-chip mounting, the bump structure and the flip-chip

Abstract: A bump structure has a bump constituted by a metal projection which is formed on an electrode of a substrate, and a solder which covers the metal projection but does not touch the electrode. The metal projection is substantially spherical and has a projected portion at a center portion on an upper surface thereof. The metal projection is made of a metal having properties of solder diffusion prevention and adhesion to solder. The bump structure may have two bumps, the first bump being substantially the same as the bump described above and the second being such that its diameter is smaller than an outer diameter of the first bump and it covers the projected portion on the first bump. This bump structure can be formed using a simple process, and can be applied to flip-chip mounting in semiconductor devices with high reliability and yield.

Guarded evaluation: pushing power management to logic synthesis/design

Abstract: The need to reduce the power consumption of the next generation of digital systems is clearly recognized at all levels of system design. At the system level, power management is a very powerful technique and delivers large and unambiguous savings. The ideas behind power management can be extended to the logic level. This would involve determining which parts of a circuit are computing results that will be used and which are not. The parts that are not needed are then "shut off." This paper describes an approach termed guarded evaluation, which is an implementation of this idea. A theoretical framework and the algorithms that form the basis of the approach are presented. The underlying idea is to automatically determine the parts of the circuit that can be disabled on a per-clock-cycle basis. This saves the power used in all the useless transitions in those parts of the circuit. Initial experiments indicate substantial power savings and the strong potential of this approach for a large number of benchmark circuits. While this paper presents the development of these ideas at the logic level of design, the same ideas have direct application at the register-transfer level of design also.